SparseTIR: Composable Abstractions for Sparse Compilation in Deep Learning
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Abstract (arXiv)
Sparse tensors are rapidly becoming critical components of modern deep learning workloads. However, developing high-performance sparse operators can be difficult and tedious, and existing vendor libraries cannot satisfy the escalating demands from new operators. Sparse tensor compilers simplify the development of operators, but efficient sparse compilation for deep learning remains challenging because a single sparse format cannot maximize hardware efficiency, and single-shot compilers cannot keep up with latest hardware and system advances. In this paper, we observe that the key to addressing both these challenges is to leverage composable formats and composable transformations. We propose SparseTIR, a sparse tensor compilation abstraction that offers composable formats and composable transformations for deep learning workloads. SparseTIR constructs a search space over these composable components for performance tuning. With these improvements, SparseTIR obtains consistent performance speedups vs vendor libraries on GPUs for single operators: 1.20-2.34x for GNN operators, 1.05-2.98x for sparse attention operators, and 0.56-7.45x for sparse convolution operators. SparseTIR also accelerates end-to-end GNNs by 1.08-1.52x for GraphSAGE training, and 4.20-40.18x for RGCN inference.
Key facts. Cited by 47 papers in the map (data through 7 Oct 2026). Builds on 50 of its 121 references that are in the map. First posted on arXiv 11 Jul 2022.
Builds on
50 of 121 references.
References · 50
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- 2018Learning to Optimize Tensor Programscited by 138
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- 2021Pixelated Butterfly: Simple and Efficient Sparse training for Neural Network Modelscited by 75
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- 2018Format Abstraction for Sparse Tensor Algebra Compilerscited by 16
- 2022Composable and Modular Code Generation in MLIR: A Structured and Retargetable Approach to Tensor Compiler Constructioncited by 8
- 2022Compiler Support for Sparse Tensor Computations in MLIRcited by 8
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- 2022SparseLNR: Accelerating Sparse Tensor Computations Using Loop Nest Restructuringcited by 2
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Citing papers per year: 2022: 1; 2023: 13; 2024: 14; 2025: 13; 2026: 6.
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- 2023Cached Operator Reordering: A Unified View for Fast GNN Training23 Aug 2023
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- 2023A Survey on Graph Neural Network Acceleration: Algorithms, Systems, and Customized Hardware24 Jun 2023
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- 2023GSplit: Scaling Graph Neural Network Training on Large Graphs via Split-Parallelismcited by 6
- 2025Your Compiler is Backdooring Your Model: Understanding and Exploiting Compilation Inconsistency Vulnerabilities in Deep Learning Compilerscited by 6
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- 2024SPLAT: A framework for optimised GPU code-generation for SParse reguLar ATtentioncited by 5
- 2024UniSparse: An Intermediate Language for General Sparse Format Customizationcited by 4
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- 2026Event Tensor: A Unified Abstraction for Compiling Dynamic Megakernel14 Apr 2026
- 2026Automated Tensor-Relational Decomposition for Large-Scale Sparse Tensor Computation9 Mar 2026
- 2025Spira: Exploiting Voxel Data Structural Properties for Efficient Sparse Convolution in Point Cloud Networks25 Nov 2025
- 2025DCC: Data-Centric Compilation of Machine Learning Kernels for Processing-In-Memory Architectures19 Nov 2025
- 2025FuseFlow: A Fusion-Centric Compilation Framework for Sparse Deep Learning on Streaming Dataflow6 Nov 2025
- 2025Your Compiler is Backdooring Your Model: Understanding and Exploiting Compilation Inconsistency Vulnerabilities in Deep Learning Compilers14 Sep 2025
- 2025Libra: Unleashing GPU Heterogeneity for High-Performance Sparse Matrix Multiplication28 Jun 2025
- 2025COGNATE: Acceleration of Sparse Tensor Programs on Emerging Hardware using Transfer Learning31 May 2025
- 2025Hexcute: A Compiler Framework for Automating Layout Synthesis in GPU Programs22 Apr 2025
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