SyntheticHLS: Building Diverse Synthetic High-Level Synthesis Datasets using LLMs
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Abstract (arXiv)
Deep learning and large language models (LLMs) are rapidly gaining adoption in semiconductor design, driving demand for training datasets. Most efforts focus on hardware description languages (HDLs) while designs for high-level synthesis (HLS), a popular approach to domain-specific accelerators, remain scarce. HLS dataset efforts emphasize manual curation or design parameterization, seldom addressing high-quality LLM-based generation or diversity in code length, hierarchy, design-space size, latency, resource utilization, and application domain, potentially limiting model generalization. We propose SyntheticHLS, a framework for generating large-scale, complex, diverse synthetic HLS datasets using LLMs. Its two key ideas are: 1) an iterative feedback-guided mutation loop that uses paired HLS source code and design-space specifications to incrementally transform seed designs into more complex, scalable designs; and 2) quantitative metrics of HLS design complexity and design-space scalability that serve as measurable objectives for LLM-guided mutation. We systematically cross-validate an HLS Quality-of-Results (QoR) deep learning model trained and tested across common HLS benchmarks, zero-shot synthetic designs, and iteratively mutated synthetic designs. Synthetic designs transfer well to common benchmark test sets while the reverse does not hold. SyntheticHLS's iteratively mutated designs provide the most generalizable training corpus among the datasets studied. Analysis of the mutation process and dataset shows that metric-guided trajectories consistently improve targeted complexity and scalability objectives without regressing non-target metrics. Mutated designs span a substantially broader, more diverse design space than zero-shot generated designs. Our framework, dataset, and evaluation are open-source: https://github.com/sharc-lab/synthetic-hls.
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References · 13
- 2018Fast inference of deep neural networks in FPGAs for particle physicscited by 133
- 2023Understanding the Potential of FPGA-Based Spatial Acceleration for Large Language Model Inferencecited by 33
- 2021IronMan: GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learningcited by 26
- 2020AutoDSE: Enabling Software Programmers to Design Efficient FPGA Acceleratorscited by 25
- 2021ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representationcited by 21
- 2018Transformations of High-Level Synthesis Codes for High-Performance Computingcited by 17
- 2024Allo: A Programming Model for Composable Accelerator Designcited by 16
- 2024HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyondcited by 8
- 2025LIFT: LLM-Based Pragma Insertion for HLS via GNN Supervised Fine-Tuningcited by 8
- 2025Intelligent experiments through real-time AI: Fast Data Processing and Autonomous Detector Control for sPHENIX and future EIC detectorscited by 3
- 2022Robotic Computing on FPGAs: Current Progress, Research Challenges, and Opportunitiescited by 2
- 2025Iceberg: Enhancing HLS Modeling with Synthetic Datacited by 1
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