Format-Aware Fusion for Fast FP4 Pretraining
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Abstract (arXiv)
Four-bit floating-point (FP4) Tensor Cores accelerate matrix multiplication, but scale computation, operand packing, layout construction, and saved backward state can erase the gain. We present format-aware fusion, which co-designs each quantization producer with its scale domain and consumer layout for native mxfp, global nvfp, and cooperative-thread-array-local nvfp. We evaluate Llama-3-family 8B pretraining through 160 billion tokens using bfloat16 output projections and compiled cross entropy. In matched same-accelerator probes, bfloat16 and Transformer Engine nvfp reach 18.8K and 27.6K tokens/s/GPU, while our fastest custom route reaches 37.9K. mxfp with row-gradient stochastic rounding and fixed-sign 32-value Hadamard weight-gradient preconditioning reaches 37.2K tokens/s/GPU (86.3% bfloat16 model FLOP utilization) and ends 2.11% above the raw bfloat16 training-loss endpoint. A Transformer Engine recipe with four final bfloat16 blocks ends 0.87% above bfloat16 at 27.1K tokens/s/GPU. Downstream rankings differ from training-loss rankings, showing that FP4 outcomes depend jointly on scale contract, operand, and execution path.
Key facts. No citing papers in the map yet (data through 7 Oct 2026). Builds on 41 of its 48 references that are in the map. First posted on arXiv 4 Sep 2026.
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References · 41
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29 more
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