Energy-Efficient Visual Inspection with FFT-Based CNNs and Adaptive Floating-Point Quantization
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Abstract (arXiv)
This paper investigates reduced-precision floating-point arithmetic for FFT-based CNN inference on an industrial CPU-FPGA platform. We combine FFT-based convolution with adaptive post-training FP8 quantization and evaluate two FPGA-oriented optimization methods: progressive bias adjustment (PBA) within the FFT and layer-wise exponent-bias selection across the CNN. The methods are implemented in a LeNet-5 accelerator using serial radix-22 SDF FFT modules and evaluated on an industrial fault detection dataset. Results show that weight scaling outperforms PBA, while layer-wise bias optimization increases the accuracy from 80.33% to 84.13% without modifying the datapath width. Compared with CPU-only inference, the FPGA achieves approximately 2.5× higher energy efficiency.
Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 2 of its 7 references that are in the map. First posted on arXiv 20 Aug 2026.
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