MiCoPro: End-to-End Mixed Precision HW/SW Co-design with HW-aware Proxy Model
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Abstract (arXiv)
Quantized Neural Networks~(QNN) with low-bitwidth data have proven promising in efficient storage and computation on edge devices. To mitigate accuracy degradation while maximizing speedup, layer-wise mixed-precision quantization~(MPQ) becomes a popular solution. However, existing algorithms for exploring MPQ schemes are limited in flexibility and efficiency. Comprehending the complex impacts of different MPQ schemes on post-training quantization and quantization-aware training results is a challenge for conventional methods. Furthermore, an end-to-end framework for the optimization and deployment of MPQ models is missing in existing work. To address these challenges, we propose the MiCo framework, a holistic MPQ exploration and deployment framework for edge AI applications. The framework adopts a novel optimization algorithm to search for accuracy-optimal quantization configurations under strict latency constraints. We further extended the framework to MiCoPro, which introduces a robust Hardware-Aware Proxy (HAP) model to enhance prediction accuracy and hardware versatility. By leveraging target-specific latency modeling, MiCoPro enables rapid exploration and direct deployment from PyTorch models to bare-metal C code. We demonstrate the versatility of our framework on both the BitFusion accelerator and SIMD-extended RISC-V processors, achieving up to 40% of latency reduction with less than 3% of accuracy drop.
Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 23 of its 42 references that are in the map. First posted on arXiv 7 Aug 2026.
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23 of 42 references.
References · 23
- 2015Deep Residual Learning for Image Recognitioncited by 52,096
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- 2023TinyStories: How Small Can Language Models Be and Still Speak Coherent English?cited by 449
- 2018HAQ: Hardware-Aware Automated Quantization with Mixed Precisioncited by 443
- 2023BitNet: Scaling 1-bit Transformers for Large Language Modelscited by 189
- 2018CMSIS-NN: Efficient Neural Network Kernels for Arm Cortex-M CPUscited by 121
- 2017Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networkscited by 109
11 more
- 2020Bayesian Bits: Unifying Quantization and Pruningcited by 94
- 2020DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUscited by 58
- 2021Stronger NAS with Weaker Predictorscited by 28
- 2022SDQ: Stochastic Differentiable Quantization with Mixed Precisioncited by 28
- 2020A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inferencecited by 13
- 2023GP-NAS-ensemble: a model for NAS Performance Predictioncited by 7
- 2024Mixed-precision Neural Networks on RISC-V Cores: ISA extensions for Multi-Pumped Soft SIMD Operationscited by 5
- 2022Edge Inference with Fully Differentiable Quantized Mixed Precision Neural Networkscited by 4
- 2023BOMP-NAS: Bayesian Optimization Mixed Precision NAScited by 4
- 2024A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inferencecited by 2
- 2025MiCo: End-to-End Mixed Precision Neural Network Co-Exploration Framework for Edge AIcited by 2
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- 2023Free Bits: Latency Optimization of Mixed-Precision Quantized Neural Networks on the Edge
- 2023On-Chip Hardware-Aware Quantization for Mixed Precision Neural Networks
- 2022AMED: Automatic Mixed-Precision Quantization for Edge Devices
- 2023A Practical Mixed Precision Algorithm for Post-Training Quantization
- 2026RAMP: Robust Adaptive Mixed-Precision Quantization for Edge CPU Vision Models
- 2026APreQEL: Adaptive Mixed Precision Quantization For Edge LLMs
- 2025InfoQ: Mixed-Precision Quantization via Global Information Flow
- 2024DNN Memory Footprint Reduction via Post-Training Intra-Layer Multi-Precision Quantization