VQ4SNN: Vector Quantization for Memory-Efficient FPGA Spiking Neural Networks
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Abstract (arXiv)
Spiking Neural Networks (SNNs) offer an energy-efficient paradigm for edge AI, making them attractive for hardware acceleration. However, deploying dense SNNs on FPGAs is constrained by limited on-chip memory for synaptic weight storage. To address this bottleneck, we propose VQ4SNN, a hardware-aware architecture that reduces memory requirements through Vector Quantization (VQ)-based weight sharing. To the best of our knowledge, this is the first application of VQ to pipelined spatial-dataflow SNN accelerators on FPGAs. VQ4SNN replaces conventional weight storage with a two-level memory organization consisting of compact pointers and a shared codebook of quantized weight vectors. The proposed design integrates FPGA-aware memory mapping with analytical VQ parameter selection, enabling efficient deployment on such accelerators while preserving inference accuracy. The experimental results show a reduction of 52-61% in the total number of BRAMs compared to the state-of-the-art uncompressed FPGA SNNs without increasing overall logic utilization.
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References · 9
- 2021Pruning and Quantization for Deep Neural Network Acceleration: A Surveycited by 259
- 2021Training Spiking Neural Networks Using Lessons From Deep Learningcited by 251
- 2019The Heidelberg spiking datasets for the systematic evaluation of spiking neural networkscited by 135
- 2018AudioMNIST: Exploring Explainable Artificial Intelligence for Audio Analysis on a Simple Benchmarkcited by 72
- 2024VPTQ: Extreme Low-bit Vector Post-Training Quantization for Large Language Modelscited by 53
- 2024Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edgecited by 18
- 2023FireFly v2: Advancing Hardware Support for High-Performance Spiking Neural Network with a Spatiotemporal FPGA Acceleratorcited by 5
- 2025SpikeFit: Towards Optimal Deployment of Spiking Networks on Neuromorphic Hardwarecited by 2
- 2026EVA: Accelerating LLM Decoding via an Efficient Vector Quantization Architecturecited by 2
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