Chimera: Neuro-Symbolic Attention Primitives for Trustworthy Dataplane Intelligence
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Abstract (arXiv)
Deploying expressive learning models directly on programmable dataplanes promises line-rate, low-latency traffic analysis but remains hindered by strict hardware constraints and the need for predictable, auditable behavior. Chimera introduces a principled framework that maps attention-oriented neural computations and symbolic constraints onto dataplane primitives, enabling trustworthy inference within the match-action pipeline. Chimera combines a kernelized, linearized attention approximation with a two-layer key-selection hierarchy and a cascade fusion mechanism that enforces hard symbolic guarantees while preserving neural expressivity. The design includes a hardware-aware mapping protocol and a two-timescale update scheme that together permit stable, line-rate operation under realistic dataplane budgets. The paper presents the Chimera architecture, a hardware mapping strategy, and empirical evidence showing that neuro-symbolic attention primitives can achieve high-fidelity inference within the resource envelope of commodity programmable switches.
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References · 22
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- 2024Convolutional Differentiable Logic Gate Networkscited by 37
- 2024HardNet: Hard-Constrained Neural Networks with Universal Approximation Guaranteescited by 29
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- 2021Energon: Towards Efficient Acceleration of Transformers Using Dynamic Sparse Attentioncited by 26
- 2013Programming Protocol-Independent Packet Processorscited by 21
- 2025AutoNeural: Co-Designing Vision-Language Models for NPU Inferencecited by 17
- 2024Brain-on-Switch: Towards Advanced Intelligent Network Data Plane via NN-Driven Traffic Analysis at Line-Speedcited by 5
- 2021An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trendscited by 2
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- 2025Pegasus: A Universal Framework for Scalable Deep Learning Inference on the Dataplanecited by 2
- 2025Real-Time In-Network Machine Learning on P4-Programmable FPGA SmartNICs with Fixed-Point Arithmetic and Taylorcited by 2
- 2025FENIX: Enabling In-Network DNN Inference with FPGA-Enhanced Programmable Switchescited by 2
- 2026SIA: Symbolic Interpretability for Anticipatory Deep Reinforcement Learning in Network Controlcited by 1
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