mlsanityData to 14 Oct 2026

Fast and Compact Tsetlin Machine Inference on CPUs Using Instruction-Level Optimization

arXiv 2510.15653 ↗First posted 17 Oct 2025cs.LGcited by 1

On the map: Efficient LLM inference and serving → Serving systems and request scheduling

Abstract (arXiv)

The Tsetlin Machine (TM) offers high-speed inference on resource-constrained devices such as CPUs. Its logic-driven operations naturally lend themselves to parallel execution on modern CPU architectures. Motivated by this, we propose an efficient software implementation of the TM by leveraging instruction-level bitwise operations for compact model representation and accelerated processing. To further improve inference speed, we introduce an early exit mechanism, which exploits the TM's AND-based clause evaluation to avoid unnecessary computations. Building upon this, we propose a literal Reorder strategy designed to maximize the likelihood of early exits. This strategy is applied during a post-training, pre-inference stage through statistical analysis of all literals and the corresponding actions of their associated Tsetlin Automata (TA), introducing negligible runtime overhead. Experimental results using the gem5 simulator with an ARM processor show that our optimized implementation reduces inference time by up to 96.71% compared to the conventional integer-based TM implementations while maintaining comparable code density.

Key facts. Cited by 1 paper in the map (data through 14 Oct 2026). Placed in Serving systems and request scheduling, one of 12 directions in Efficient LLM inference and serving. Builds on 5 of its 12 references that are in the map. First posted on arXiv 17 Oct 2025.

Builds on

5 of 12 references.

References · 5

  1. 2019Convergence of Edge Computing and Deep Learning: A Comprehensive Surveycited by 120
  2. 2018The Tsetlin Machine -- A Game Theoretic Bandit Driven Approach to Optimal Pattern Recognition with Propositional Logiccited by 72
  3. 2025ETHEREAL: Energy-efficient and High-throughput Inference using Compressed Tsetlin Machinecited by 4
  4. 2013The bitwise operations related to a fast sorting algorithmcited by 1
  5. 2025Runtime Tunable Tsetlin Machines for Edge Inference on eFPGAscited by 1

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2026: 1.

1 paper.

  1. 2026Low-Energy Reduced RISC-V Instruction Subset Processor for Tsetlin Machine Inference at the Edgecited by 1

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  2. 2025SAIL: SRAM-Accelerated LLM Inference System with Lookup-Table-based GEMV
  3. 2025T-MAN: Enabling End-to-End Low-Bit LLM Inference on NPUs via Unified Table Lookup
  4. 2026ExaGEMM: Exploration Framework for CPU-Driven ML Inference via Associative In-Register Computing for Low-Bit GEMM
  5. 2026FairyFuse: Multiplication-Free LLM Inference on CPUs via Fused Ternary Kernels
  6. 2026Litespark Inference For CPUs: Ultra-Fast SIMD Framework for Ternary (1.58-bit) Language Models
  7. 2024MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications
  8. 2023Efficient LLM Inference on CPUs