ETHEREAL: Energy-efficient and High-throughput Inference using Compressed Tsetlin Machine
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Abstract (arXiv)
The Tsetlin Machine (TM) is a novel alternative to deep neural networks (DNNs). Unlike DNNs, which rely on multi-path arithmetic operations, a TM learns propositional logic patterns from data literals using Tsetlin automata. This fundamental shift from arithmetic to logic underpinning makes TM suitable for empowering new applications with low-cost implementations. In TM, literals are often included by both positive and negative clauses within the same class, canceling out their impact on individual class definitions. This property can be exploited to develop compressed TM models, enabling energy-efficient and high-throughput inferences for machine learning (ML) applications. We introduce a training approach that incorporates excluded automata states to sparsify TM logic patterns in both positive and negative clauses. This exclusion is iterative, ensuring that highly class-correlated (and therefore significant) literals are retained in the compressed inference model, ETHEREAL, to maintain strong classification accuracy. Compared to standard TMs, ETHEREAL TM models can reduce model size by up to 87.54%, with only a minor accuracy compromise. We validate the impact of this compression on eight real-world Tiny machine learning (TinyML) datasets against standard TM, equivalent Random Forest (RF) and Binarized Neural Network (BNN) on the STM32F746G-DISCO platform. Our results show that ETHEREAL TM models achieve over an order of magnitude reduction in inference time (resulting in higher throughput) and energy consumption compared to BNNs, while maintaining a significantly smaller memory footprint compared to RFs.
Key facts. Cited by 4 papers in the map (data through 7 Oct 2026). Builds on 3 of its 22 references that are in the map. First posted on arXiv 8 Feb 2025.
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Citing papers per year: 2025: 1; 2026: 3.
4 papers.
- 2025Fast and Compact Tsetlin Machine Inference on CPUs Using Instruction-Level Optimizationcited by 1
- 2026Low-Energy Reduced RISC-V Instruction Subset Processor for Tsetlin Machine Inference at the Edgecited by 1
- 2026Explainable and Hardware-Efficient Jamming Detection for 5G Networks Using the Convolutional Tsetlin Machinecited by 0
- 2026Target-confidence Recourse Using tSeTlin machines: TRUSTcited by 0
- 2026Low-Energy Reduced RISC-V Instruction Subset Processor for Tsetlin Machine Inference at the Edge18 Jun 2026
- 2026Target-confidence Recourse Using tSeTlin machines: TRUST17 Jun 2026
- 2026Explainable and Hardware-Efficient Jamming Detection for 5G Networks Using the Convolutional Tsetlin Machine7 Mar 2026
- 2025Fast and Compact Tsetlin Machine Inference on CPUs Using Instruction-Level Optimization17 Oct 2025