mlsanityData to 7 Oct 2026

VUSA: Virtually Upscaled Systolic Array Architecture to Exploit Unstructured Sparsity in AI Acceleration

arXiv 2506.01166 ↗First posted 1 Jun 2025cs.AR cs.AI cs.LGcited by 0

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Abstract (arXiv)

Leveraging high degrees of unstructured sparsity is a promising approach to enhance the efficiency of deep neural network DNN accelerators - particularly important for emerging Edge-AI applications. We introduce VUSA, a systolic-array architecture that virtually grows based on the present sparsity to perform larger matrix multiplications with the same number of physical multiply-accumulate MAC units. The proposed architecture achieves saving by 37% and 68% in area and power efficiency, respectively, at the same peak-performance, compared to a baseline systolic array architecture in a commercial 16-nm technology. Still, the proposed architecture supports acceleration for any DNN with any sparsity - even no sparsity at all. Thus, the proposed architecture is application-independent, making it viable for general-purpose AI acceleration.

Key facts. No citing papers in the map yet (data through 7 Oct 2026). Builds on 11 of its 17 references that are in the map. First posted on arXiv 1 Jun 2025.

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References · 11

  1. 2015Deep Residual Learning for Image Recognitioncited by 51,809
  2. 2017MobileNets: Efficient Convolutional Neural Networks for Mobile Vision Applicationscited by 3,827
  3. 2015Deep Compression: Compressing Deep Neural Networks with Pruning, Trained Quantization and Huffman Codingcited by 2,291
  4. 2017In-Datacenter Performance Analysis of a Tensor Processing Unitcited by 610
  5. 2020A Survey of Convolutional Neural Networks: Analysis, Applications, and Prospectscited by 396
  6. 2016EIE: Efficient Inference Engine on Compressed Deep Neural Networkcited by 291
  7. 2017SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networkscited by 132
  8. 2021S2TA: Exploiting Structured Sparsity for Energy-Efficient Mobile CNN Accelerationcited by 19
  9. 2022Sense: Model Hardware Co-design for Accelerating Sparse CNN on Systolic Arraycited by 3
  10. 2021Synapse Compression for Event-Based Convolutional-Neural-Network Acceleratorscited by 1
  11. 2023Exploiting Neural-Network Statistics for Low-Power DNN Inferencecited by 1

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