VUSA: Virtually Upscaled Systolic Array Architecture to Exploit Unstructured Sparsity in AI Acceleration
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Abstract (arXiv)
Leveraging high degrees of unstructured sparsity is a promising approach to enhance the efficiency of deep neural network DNN accelerators - particularly important for emerging Edge-AI applications. We introduce VUSA, a systolic-array architecture that virtually grows based on the present sparsity to perform larger matrix multiplications with the same number of physical multiply-accumulate MAC units. The proposed architecture achieves saving by 37% and 68% in area and power efficiency, respectively, at the same peak-performance, compared to a baseline systolic array architecture in a commercial 16-nm technology. Still, the proposed architecture supports acceleration for any DNN with any sparsity - even no sparsity at all. Thus, the proposed architecture is application-independent, making it viable for general-purpose AI acceleration.
Key facts. No citing papers in the map yet (data through 7 Oct 2026). Builds on 11 of its 17 references that are in the map. First posted on arXiv 1 Jun 2025.
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References · 11
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- 2021S2TA: Exploiting Structured Sparsity for Energy-Efficient Mobile CNN Accelerationcited by 19
- 2022Sense: Model Hardware Co-design for Accelerating Sparse CNN on Systolic Arraycited by 3
- 2021Synapse Compression for Event-Based Convolutional-Neural-Network Acceleratorscited by 1
- 2023Exploiting Neural-Network Statistics for Low-Power DNN Inferencecited by 1
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