mlsanityData to 14 Oct 2026

Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning

arXiv 2505.22404 ↗First posted 28 May 2025cs.AR cs.ROcited by 5

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Abstract (arXiv)

Autonomous robots require efficient on-device learning to adapt to new environments without cloud dependency. For this edge training, Microscaling (MX) data types offer a promising solution by combining integer and floating-point representations with shared exponents, reducing energy consumption while maintaining accuracy. However, the state-of-the-art continuous learning processor, namely Dacapo, faces limitations with its MXINT-only support and inefficient vector-based grouping during backpropagation. In this paper, we present, to the best of our knowledge, the first work that addresses these limitations with two key innovations: (1) a precision-scalable arithmetic unit that supports all six MX data types by exploiting sub-word parallelism and unified integer and floating-point processing; and (2) support for square shared exponent groups to enable efficient weight handling during backpropagation, removing storage redundancy and quantization overhead. We evaluate our design against Dacapo under iso-peak-throughput on four robotics workloads in TSMC 16nm FinFET technology at 400MHz, reaching a 51% lower memory footprint, and 4x higher effective training throughput, while achieving comparable energy efficiency, enabling efficient robotics continual learning at the edge.

Key facts. Cited by 5 papers in the map (data through 14 Oct 2026). First posted on arXiv 28 May 2025.

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2025: 2; 2026: 3.

5 papers.

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  1. 2025MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products
  2. 2025Characterization and Mitigation of Training Instabilities in Microscaling Formats
  3. 2025On-Device Fine-Tuning via Backprop-Free Zeroth-Order Optimization
  4. 2025Control of Microrobots with Reinforcement Learning under On-Device Compute Constraints
  5. 2026Making Analog Training Scale: Co-Designing Mapping, Optimizer, and Converters
  6. 2025Elucidating the Design Space of FP4 training
  7. 2026MX-SAFE: Versatile Inference- and Training-Proof Microscaling Format with On-the-Fly Exponent and Mantissa Bit Allocation
  8. 2023A Dataflow Compiler for Efficient LLM Inference using Custom Microscaling Formats