Neural Architecture Codesign for Fast Physics Applications
Not on the map. Why?
Abstract (arXiv)
We develop a pipeline to streamline neural architecture codesign for physics applications to reduce the need for ML expertise when designing models for novel tasks. Our method employs neural architecture search and network compression in a two-stage approach to discover hardware efficient models. This approach consists of a global search stage that explores a wide range of architectures while considering hardware constraints, followed by a local search stage that fine-tunes and compresses the most promising candidates. We exceed performance on various tasks and show further speedup through model compression techniques such as quantization-aware-training and neural network pruning. We synthesize the optimal models to high level synthesis code for FPGA deployment with the hls4ml library. Additionally, our hierarchical search space provides greater flexibility in optimization, which can easily extend to other tasks and domains. We demonstrate this with two case studies: Bragg peak finding in materials science and jet classification in high energy physics, achieving models with improved accuracy, smaller latencies, or reduced resource utilization relative to the baseline models.
Key facts. Cited by 5 papers in the map (data through 7 Oct 2026). Builds on 15 of its 30 references that are in the map. First posted on arXiv 9 Jan 2025.
Builds on
15 of 30 references.
References · 15
- 2019Optuna: A Next-generation Hyperparameter Optimization Frameworkcited by 2,455
- 2016Inception-v4, Inception-ResNet and the Impact of Residual Connections on Learningcited by 1,509
- 2016Neural Architecture Search with Reinforcement Learningcited by 1,489
- 2017Deep Setscited by 1,394
- 2019Once-for-All: Train One Network and Specialize it for Efficient Deploymentcited by 778
- 2020What is the State of Neural Network Pruning?cited by 578
- 2021Pruning and Quantization for Deep Neural Network Acceleration: A Surveycited by 259
- 2020A Comprehensive Survey of Neural Architecture Search: Challenges and Solutionscited by 253
- 2021Zero-Cost Proxies for Lightweight NAScited by 194
- 2018Neural Architecture Search with Bayesian Optimisation and Optimal Transportcited by 192
- 2018Fast inference of deep neural networks in FPGAs for particle physicscited by 132
- 2018Energy Flow Networks: Deep Sets for Particle Jetscited by 83
Built on by
Citing papers per year: 2025: 4; 2026: 1.
5 papers.
- 2025hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardwarecited by 8
- 2025Sub-microsecond Transformers for Jet Tagging on FPGAscited by 6
- 2025AI Benchmark Democratization and Carpentrycited by 3
- 2025An MLCommons Scientific Benchmarks Ontologycited by 2
- 2026SNAC-Pack 2.0: Scaled-Out Surrogate Neural Architecture Codesigncited by 0
- 2026SNAC-Pack 2.0: Scaled-Out Surrogate Neural Architecture Codesign15 May 2026
- 2025AI Benchmark Democratization and Carpentry12 Dec 2025
- 2025hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware1 Dec 2025
- 2025An MLCommons Scientific Benchmarks Ontology6 Nov 2025
- 2025Sub-microsecond Transformers for Jet Tagging on FPGAs26 Oct 2025