DEAP: Design Space Exploration for DNN Accelerator Parallelism
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Abstract (arXiv)
The boom in Large Language Models (LLMs) like GPT-4 and ChatGPT has marked a significant advancement in artificial intelligence. These models are becoming increasingly complex and powerful to train and serve. This growth in capabilities comes with a substantial increase in computational requirements, both in terms of hardware resources and energy consumption. The goal of this paper is to showcase how hardware and software co-design can come together and allow us to create customized hardware systems for specific LLM workloads. We propose a simulation workflow that allows us to combine model parallelism techniques with a multi-accelerator simulation framework for efficiency metrics. We focus on inference workloads and report power, cycle, and latency metrics upon performing a design space exploration search over multiple software and hardware configurations.
Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 18 of its 37 references that are in the map. First posted on arXiv 24 Dec 2023.
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References · 18
- 2018BERT: Pre-training of Deep Bidirectional Transformers for Language Understandingcited by 40,399
- 2020Language Models are Few-Shot Learnerscited by 32,419
- 2023GPT-4 Technical Reportcited by 18,396
- 2023LLaMA: Open and Efficient Foundation Language Modelscited by 14,132
- 2023Llama 2: Open Foundation and Fine-Tuned Chat Modelscited by 13,028
- 2020Retrieval-Augmented Generation for Knowledge-Intensive NLP Taskscited by 9,297
- 2023A Survey of Large Language Modelscited by 2,576
- 2022LLM.int8(): 8-bit Matrix Multiplication for Transformers at Scalecited by 906
- 2023PyTorch FSDP: Experiences on Scaling Fully Sharded Data Parallelcited by 660
- 2017To prune, or not to prune: exploring the efficacy of pruning for model compressioncited by 603
- 2020Towards Understanding Ensemble, Knowledge Distillation and Self-Distillation in Deep Learningcited by 297
- 2023TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddingscited by 202
6 more
- 2021Efficient Large Scale Language Modeling with Mixtures of Expertscited by 175
- 2019Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integrationcited by 63
- 2018Interstellar: Using Halide's Scheduling Language to Analyze DNN Acceleratorscited by 34
- 2021Data-Driven Offline Optimization For Architecting Hardware Acceleratorscited by 29
- 2019HyPar: Towards Hybrid Parallelism for Deep Learning Accelerator Arraycited by 15
- 2022DiGamma: Domain-aware Genetic Algorithm for HW-Mapping Co-optimization for DNN Acceleratorscited by 7
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