MEMA Runtime Framework: Minimizing External Memory Accesses for TinyML on Microcontrollers
Not on the map. Why?
Abstract (arXiv)
We present the MEMA framework for the easy and quick derivation of efficient inference runtimes that minimize external memory accesses for matrix multiplication on TinyML systems. The framework accounts for hardware resource constraints and problem sizes in analytically determining optimized schedules and kernels that minimize memory accesses. MEMA provides a solution to a well-known problem in the current practice, that is, optimal schedules tend to be found only through a time consuming and heuristic search of a large scheduling space. We compare the performance of runtimes derived from MEMA to existing state-of-the-art libraries on ARM-based TinyML systems. For example, for neural network benchmarks on the ARM Cortex-M4, we achieve up to a 1.8x speedup and 44% energy reduction over CMSIS-NN.
Key facts. Cited by 2 papers in the map (data through 14 Oct 2026). Builds on 8 of its 25 references that are in the map. First posted on arXiv 12 Apr 2023.
Builds on
8 of 25 references.
References · 8
- 2020MCUNet: Tiny Deep Learning on IoT Devicescited by 273
- 2020TensorFlow Lite Micro: Embedded Machine Learning on TinyML Systemscited by 165
- 2021MLPerf Tiny Benchmarkcited by 124
- 2018CMSIS-NN: Efficient Neural Network Kernels for Arm Cortex-M CPUscited by 121
- 2020DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUscited by 58
- 2017Parallel Multi Channel Convolution using General Matrix Multiplicationcited by 30
- 2021TinyML for Ubiquitous Edge AIcited by 13
- 2022Distributed On-Sensor Compute System for AR/VR Devices: A Semi-Analytical Simulation Framework for Power Estimationcited by 8
Built on by
Citing papers per year: 2025: 2.
2 papers.