mlsanityData to 7 Oct 2026

Unlocking the potential of two-point cells for energy-efficient and resilient training of deep nets

arXiv 2211.01950 ↗First posted 24 Oct 2022cs.NE cs.CV cs.LGcited by 5

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Abstract (arXiv)

Context-sensitive two-point layer 5 pyramidal cells (L5PCs) were discovered as long ago as 1999. However, the potential of this discovery to provide useful neural computation has yet to be demonstrated. Here we show for the first time how a transformative L5PCs-driven deep neural network (DNN), termed the multisensory cooperative computing (MCC) architecture, can effectively process large amounts of heterogeneous real-world audio-visual (AV) data, using far less energy compared to best available 'point' neuron-driven DNNs. A novel highly-distributed parallel implementation on a Xilinx UltraScale+ MPSoC device estimates energy savings up to 245759 × 50000 μJ (i.e., 62% less than the baseline model in a semi-supervised learning setup) where a single synapse consumes 8e-5μJ. In a supervised learning setup, the energy-saving can potentially reach up to 1250x less (per feedforward transmission) than the baseline model. The significantly reduced neural activity in MCC leads to inherently fast learning and resilience against sudden neural damage. This remarkable performance in pilot experiments demonstrates the embodied neuromorphic intelligence of our proposed cooperative L5PC that receives input from diverse neighbouring neurons as context to amplify the transmission of most salient and relevant information for onward transmission, from overwhelmingly large multimodal information utilised at the early stages of on-chip training. Our proposed approach opens new cross-disciplinary avenues for future on-chip DNN training implementations and posits a radical shift in current neuromorphic computing paradigms.

Key facts. Cited by 5 papers in the map (data through 7 Oct 2026). Builds on 21 of its 68 references that are in the map. First posted on arXiv 24 Oct 2022.

Builds on

21 of 68 references.

References · 21

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9 more
  1. 2017Neuromorphic Hardware In The Loop: Training a Deep Spiking Network on the BrainScaleS Wafer-Scale Systemcited by 19
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Cited by year (2026 to 7 Oct)

Citing papers per year: 2023: 1; 2024: 1; 2025: 2; 2026: 1.

5 papers.