Neuromorphic Hardware In The Loop: Training a Deep Spiking Network on the BrainScaleS Wafer-Scale System
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Abstract (arXiv)
Emulating spiking neural networks on analog neuromorphic hardware offers several advantages over simulating them on conventional computers, particularly in terms of speed and energy consumption. However, this usually comes at the cost of reduced control over the dynamics of the emulated networks. In this paper, we demonstrate how iterative training of a hardware-emulated network can compensate for anomalies induced by the analog substrate. We first convert a deep neural network trained in software to a spiking network on the BrainScaleS wafer-scale neuromorphic system, thereby enabling an acceleration factor of 10 000 compared to the biological time domain. This mapping is followed by the in-the-loop training, where in each training step, the network activity is first recorded in hardware and then used to compute the parameter updates in software via backpropagation. An essential finding is that the parameter updates do not have to be precise, but only need to approximately follow the correct gradient, which simplifies the computation of updates. Using this approach, after only several tens of iterations, the spiking network shows an accuracy close to the ideal software-emulated prototype. The presented techniques show that deep spiking networks emulated on analog neuromorphic devices can attain good computational performance despite the inherent variations of the analog substrate.
Key facts. Cited by 19 papers in the map (data through 7 Oct 2026). First posted on arXiv 6 Mar 2017.
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Citing papers per year: 2021: 4; 2022: 5; 2023: 2; 2024: 3; 2025: 2; 2026: 3.
19 papers.
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- 2021Brain-inspired computing: We need a master plancited by 51
- 2021Sparse Spiking Gradient Descentcited by 41
- 2023High-performance deep spiking neural networks with 0.3 spikes per neuroncited by 22
- 2021The Yin-Yang datasetcited by 10
- 2023Differentiable graph-structured models for inverse design of lattice materialscited by 8
- 2022Unlocking the potential of two-point cells for energy-efficient and resilient training of deep netscited by 5
- 2022Navigating Local Minima in Quantized Spiking Neural Networkscited by 4
- 2024Distributed Representations Enable Robust Multi-Timescale Symbolic Computation in Neuromorphic Hardwarecited by 3
- 2022Effect of Batch Normalization on Noise Resistant Property of Deep Learning Modelscited by 2
- 2024Towards Chip-in-the-loop Spiking Neural Network Training via Metropolis-Hastings Samplingcited by 2
- 2021Demonstrating Analog Inference on the BrainScaleS-2 Mobile Systemcited by 1
- 2025Memristor-Based Neural Network Accelerators for Space Applications: Enhancing Performance with Temporal Averaging and SIRENscited by 1
7 more
- 2022Impact of Learning Rate on Noise Resistant Property of Deep Learning Modelscited by 0
- 2022Exploring Tradeoffs in Spiking Neural Networkscited by 0
- 2024Efficient Spatio-Temporal Signal Recognition on Edge Devices Using PointLCA-Netcited by 0
- 2025DarwinWafer: A Wafer-Scale Neuromorphic Chipcited by 0
- 2026Learning Long-Range Dependencies with Temporal Predictive Codingcited by 0
- 2026A Synthesizable RTL Implementation of Predictive Coding Networkscited by 0
- 2026The SpiNNaker2 chip: a many-core platform for flexible and scalable brain-inspired computingcited by 0
- 2026The SpiNNaker2 chip: a many-core platform for flexible and scalable brain-inspired computing27 Jul 2026
- 2026A Synthesizable RTL Implementation of Predictive Coding Networks18 Mar 2026
- 2026Learning Long-Range Dependencies with Temporal Predictive Coding20 Feb 2026
- 2025Memristor-Based Neural Network Accelerators for Space Applications: Enhancing Performance with Temporal Averaging and SIRENs2 Sep 2025
- 2025DarwinWafer: A Wafer-Scale Neuromorphic Chip30 Aug 2025
- 2024Efficient Spatio-Temporal Signal Recognition on Edge Devices Using PointLCA-Net21 Nov 2024
- 2024Distributed Representations Enable Robust Multi-Timescale Symbolic Computation in Neuromorphic Hardware2 May 2024
- 2024Towards Chip-in-the-loop Spiking Neural Network Training via Metropolis-Hastings Sampling9 Feb 2024
- 2023High-performance deep spiking neural networks with 0.3 spikes per neuron14 Jun 2023
- 2023Differentiable graph-structured models for inverse design of lattice materials11 Apr 2023
- 2022Exploring Tradeoffs in Spiking Neural Networks15 Dec 2022
- 2022Unlocking the potential of two-point cells for energy-efficient and resilient training of deep nets24 Oct 2022
7 more
- 2022Effect of Batch Normalization on Noise Resistant Property of Deep Learning Models15 May 2022
- 2022Impact of Learning Rate on Noise Resistant Property of Deep Learning Models8 May 2022
- 2022Navigating Local Minima in Quantized Spiking Neural Networks15 Feb 2022
- 2021Sparse Spiking Gradient Descent18 May 2021
- 2021Brain-inspired computing: We need a master plan29 Apr 2021
- 2021Demonstrating Analog Inference on the BrainScaleS-2 Mobile System29 Mar 2021
- 2021The Yin-Yang dataset16 Feb 2021
- 2021Brain-inspired computing: We need a master plancited by 51
- 2021Sparse Spiking Gradient Descentcited by 41
- 2023High-performance deep spiking neural networks with 0.3 spikes per neuroncited by 22
- 2021The Yin-Yang datasetcited by 10
- 2023Differentiable graph-structured models for inverse design of lattice materialscited by 8
- 2022Unlocking the potential of two-point cells for energy-efficient and resilient training of deep netscited by 5
- 2022Navigating Local Minima in Quantized Spiking Neural Networkscited by 4
- 2024Distributed Representations Enable Robust Multi-Timescale Symbolic Computation in Neuromorphic Hardwarecited by 3
- 2022Effect of Batch Normalization on Noise Resistant Property of Deep Learning Modelscited by 2
- 2024Towards Chip-in-the-loop Spiking Neural Network Training via Metropolis-Hastings Samplingcited by 2
- 2021Demonstrating Analog Inference on the BrainScaleS-2 Mobile Systemcited by 1
- 2025Memristor-Based Neural Network Accelerators for Space Applications: Enhancing Performance with Temporal Averaging and SIRENscited by 1
12 most cited of 19 All 19 (JSON)
- 2026The SpiNNaker2 chip: a many-core platform for flexible and scalable brain-inspired computing27 Jul 2026
- 2026A Synthesizable RTL Implementation of Predictive Coding Networks18 Mar 2026
- 2026Learning Long-Range Dependencies with Temporal Predictive Coding20 Feb 2026
- 2025Memristor-Based Neural Network Accelerators for Space Applications: Enhancing Performance with Temporal Averaging and SIRENs2 Sep 2025
- 2025DarwinWafer: A Wafer-Scale Neuromorphic Chip30 Aug 2025
- 2024Efficient Spatio-Temporal Signal Recognition on Edge Devices Using PointLCA-Net21 Nov 2024
- 2024Distributed Representations Enable Robust Multi-Timescale Symbolic Computation in Neuromorphic Hardware2 May 2024
- 2024Towards Chip-in-the-loop Spiking Neural Network Training via Metropolis-Hastings Sampling9 Feb 2024
- 2023High-performance deep spiking neural networks with 0.3 spikes per neuron14 Jun 2023
- 2023Differentiable graph-structured models for inverse design of lattice materials11 Apr 2023
- 2022Exploring Tradeoffs in Spiking Neural Networks15 Dec 2022
- 2022Unlocking the potential of two-point cells for energy-efficient and resilient training of deep nets24 Oct 2022
12 newest of 19 All 19 (JSON)