Dynamic N:M Fine-grained Structured Sparse Attention Mechanism
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Abstract (arXiv)
Transformers are becoming the mainstream solutions for various tasks like NLP and Computer vision. Despite their success, the high complexity of the attention mechanism hinders them from being applied to latency-sensitive tasks. Tremendous efforts have been made to alleviate this problem, and many of them successfully reduce the asymptotic complexity to linear. Nevertheless, most of them fail to achieve practical speedup over the original full attention under moderate sequence lengths and are unfriendly to finetuning. In this paper, we present DFSS, an attention mechanism that dynamically prunes the full attention weight matrix to N:M fine-grained structured sparse pattern. We provide both theoretical and empirical evidence that demonstrates DFSS is a good approximation of the full attention mechanism. We propose a dedicated CUDA kernel design that completely eliminates the dynamic pruning overhead and achieves speedups under arbitrary sequence length. We evaluate the 1:2 and 2:4 sparsity under different configurations and achieve 1.27~ 1.89x speedups over the full-attention mechanism. It only takes a couple of finetuning epochs from the pretrained model to achieve on par accuracy with full attention mechanism on tasks from various domains under different sequence lengths from 384 to 4096.
Key facts. Cited by 14 papers in the map (data through 7 Oct 2026). Builds on 28 of its 38 references that are in the map. First posted on arXiv 28 Feb 2022.
Builds on
28 of 38 references.
References · 28
- 2017Attention Is All You Needcited by 59,932
- 2020An Image is Worth 16x16 Words: Transformers for Image Recognition at Scalecited by 29,915
- 2020Longformer: The Long-Document Transformercited by 3,362
- 2018The Lottery Ticket Hypothesis: Finding Sparse, Trainable Neural Networkscited by 2,250
- 2020Transformers are RNNs: Fast Autoregressive Transformers with Linear Attentioncited by 1,979
- 2020Big Bird: Transformers for Longer Sequencescited by 1,673
- 2020Reformer: The Efficient Transformercited by 1,658
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16 more
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- 2020MobileBERT: a Compact Task-Agnostic BERT for Resource-Limited Devicescited by 476
- 2020Efficient Content-Based Sparse Attention with Routing Transformerscited by 469
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- 2019Q8BERT: Quantized 8Bit BERTcited by 296
- 2020Sparse Sinkhorn Attentioncited by 250
- 2020SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruningcited by 228
- 2021Accelerating Sparse Deep Neural Networkscited by 213
- 2018Scaling Neural Machine Translationcited by 204
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Citing papers per year: 2023: 4; 2024: 4; 2025: 4; 2026: 2.
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- 2024FlightLLM: Efficient Large Language Model Inference with a Complete Mapping Flow on FPGAscited by 60
- 2024ZipVL: Efficient Large Vision-Language Models with Dynamic Token Sparsificationcited by 43
- 2024SLoPe: Double-Pruned Sparse Plus Lazy Low-Rank Adapter Pretraining of LLMscited by 18
- 2025Generalized Neighborhood Attention: Multi-dimensional Sparse Attention at the Speed of Lightcited by 16
- 2023VENOM: A Vectorized N:M Format for Unleashing the Power of Sparse Tensor Corescited by 13
- 2024Preserving Deep Representations In One-Shot Pruning: A Hessian-Free Second-Order Optimization Frameworkcited by 10
- 2023Efficient N:M Sparse DNN Training Using Algorithm, Architecture, and Dataflow Co-Designcited by 5
- 2023The Information Pathways Hypothesis: Transformers are Dynamic Self-Ensemblescited by 4
- 2025MEADOW: Memory-efficient Dataflow and Data Packing for Low Power Edge LLMscited by 3
- 2025Samoyeds: Accelerating MoE Models with Structured Sparsity Leveraging Sparse Tensor Corescited by 2
- 2023Learning Section Weights for Multi-Label Document Classificationcited by 0
- 2025Vectorized FlashAttention with Low-cost Exponential Computation in RISC-V Vector Processorscited by 0
2 more
- 2026HieraSparse: Hierarchical Semi-Structured Sparse KV Attentioncited by 0
- 2026ELiTeFormer: An Efficient Transformer for FPGAscited by 0
- 2026ELiTeFormer: An Efficient Transformer for FPGAs4 Jul 2026
- 2026HieraSparse: Hierarchical Semi-Structured Sparse KV Attention18 Apr 2026
- 2025Vectorized FlashAttention with Low-cost Exponential Computation in RISC-V Vector Processors8 Oct 2025
- 2025Generalized Neighborhood Attention: Multi-dimensional Sparse Attention at the Speed of Light23 Apr 2025
- 2025Samoyeds: Accelerating MoE Models with Structured Sparsity Leveraging Sparse Tensor Cores13 Mar 2025
- 2025MEADOW: Memory-efficient Dataflow and Data Packing for Low Power Edge LLMs14 Feb 2025
- 2024Preserving Deep Representations In One-Shot Pruning: A Hessian-Free Second-Order Optimization Framework27 Nov 2024
- 2024ZipVL: Efficient Large Vision-Language Models with Dynamic Token Sparsification11 Oct 2024
- 2024SLoPe: Double-Pruned Sparse Plus Lazy Low-Rank Adapter Pretraining of LLMs25 May 2024
- 2024FlightLLM: Efficient Large Language Model Inference with a Complete Mapping Flow on FPGAs8 Jan 2024
- 2023Learning Section Weights for Multi-Label Document Classification26 Nov 2023
- 2023VENOM: A Vectorized N:M Format for Unleashing the Power of Sparse Tensor Cores3 Oct 2023
- 2024SLoPe: Double-Pruned Sparse Plus Lazy Low-Rank Adapter Pretraining of LLMscited by 18
- 2025Generalized Neighborhood Attention: Multi-dimensional Sparse Attention at the Speed of Lightcited by 16
- 2023VENOM: A Vectorized N:M Format for Unleashing the Power of Sparse Tensor Corescited by 13
- 2024Preserving Deep Representations In One-Shot Pruning: A Hessian-Free Second-Order Optimization Frameworkcited by 10
- 2023Efficient N:M Sparse DNN Training Using Algorithm, Architecture, and Dataflow Co-Designcited by 5
- 2023The Information Pathways Hypothesis: Transformers are Dynamic Self-Ensemblescited by 4
- 2025MEADOW: Memory-efficient Dataflow and Data Packing for Low Power Edge LLMscited by 3
- 2023Learning Section Weights for Multi-Label Document Classificationcited by 0
- 2025Vectorized FlashAttention with Low-cost Exponential Computation in RISC-V Vector Processorscited by 0
- 2026ELiTeFormer: An Efficient Transformer for FPGAscited by 0
- 2026ELiTeFormer: An Efficient Transformer for FPGAs4 Jul 2026
- 2025Vectorized FlashAttention with Low-cost Exponential Computation in RISC-V Vector Processors8 Oct 2025
- 2025Generalized Neighborhood Attention: Multi-dimensional Sparse Attention at the Speed of Light23 Apr 2025
- 2025MEADOW: Memory-efficient Dataflow and Data Packing for Low Power Edge LLMs14 Feb 2025
- 2024Preserving Deep Representations In One-Shot Pruning: A Hessian-Free Second-Order Optimization Framework27 Nov 2024
- 2024SLoPe: Double-Pruned Sparse Plus Lazy Low-Rank Adapter Pretraining of LLMs25 May 2024
- 2023Learning Section Weights for Multi-Label Document Classification26 Nov 2023
- 2023VENOM: A Vectorized N:M Format for Unleashing the Power of Sparse Tensor Cores3 Oct 2023
- 2023Efficient N:M Sparse DNN Training Using Algorithm, Architecture, and Dataflow Co-Design22 Sep 2023
- 2023The Information Pathways Hypothesis: Transformers are Dynamic Self-Ensembles2 Jun 2023