ReFloat: Low-Cost Floating-Point Processing in ReRAM for Accelerating Iterative Linear Solvers
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Abstract (arXiv)
Resistive random access memory (ReRAM) is a promising technology that can perform low-cost and in-situ matrix-vector multiplication (MVM) in analog domain. Scientific computing requires high-precision floating-point (FP) processing. However, performing floating-point computation in ReRAM is challenging because of high hardware cost and execution time due to the large FP value range. In this work we present ReFloat, a data format and an accelerator architecture, for low-cost and high-performance floating-point processing in ReRAM for iterative linear solvers. ReFloat matches the ReRAM crossbar hardware and represents a block of FP values with reduced bits and an optimized exponent base for a high range of dynamic representation. Thus, ReFloat achieves less ReRAM crossbar consumption and fewer processing cycles and overcomes the noncovergence issue in a prior work. The evaluation on the SuiteSparse matrices shows ReFloat achieves 5.02x to 84.28x improvement in terms of solver time compared to a state-of-the-art ReRAM based accelerator.
Key facts. Cited by 3 papers in the map (data through 13 Oct 2026). First posted on arXiv 6 Nov 2020.
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Citing papers per year: 2024: 1; 2025: 1; 2026: 1.
3 papers.
- 2025In-memory Training on Analog Devices with Limited Conductance States via Multi-tile Residual Learningcited by 3
- 2024BitQ: Tailoring Block Floating Point Precision for Improved DNN Efficiency on Resource-Constrained Devicescited by 1
- 2026DARTH-PUM: A Hybrid Processing-Using-Memory Architecturecited by 0
- 2026DARTH-PUM: A Hybrid Processing-Using-Memory Architecture17 Feb 2026
- 2025In-memory Training on Analog Devices with Limited Conductance States via Multi-tile Residual Learning2 Oct 2025
- 2024BitQ: Tailoring Block Floating Point Precision for Improved DNN Efficiency on Resource-Constrained Devices25 Sep 2024