Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA
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Abstract (arXiv)
Modern electronic systems become evermore complex, yet remain modular, with integrated circuits (ICs) acting as versatile hardware components at their heart. Electronic design automation (EDA) for ICs has focused traditionally on power, performance, and area. However, given the rise of hardware-centric security threats, we believe that EDA must also adopt related notions like secure by design and secure composition of hardware. Despite various promising studies, we argue that some aspects still require more efforts, for example: effective means for compilation of assumptions and constraints for security schemes, all the way from the system level down to the "bare metal"; modeling, evaluation, and consideration of security-relevant metrics; or automated and holistic synthesis of various countermeasures, without inducing negative cross-effects. In this paper, we first introduce hardware security for the EDA community. Next we review prior (academic) art for EDA-driven security evaluation and implementation of countermeasures. We then discuss strategies and challenges for advancing research and development toward secure composition of circuits and systems.
Key facts. Cited by 4 papers in the map (data through 7 Oct 2026). First posted on arXiv 27 Jan 2020.
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Citing papers per year: 2022: 1; 2023: 0; 2024: 2; 2025: 0; 2026: 1.
4 papers.
- 2024LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trustcited by 18
- 2022Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICscited by 3
- 2026LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verificationcited by 1
- 2024TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojanscited by 0
- 2026LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification6 Jan 2026
- 2024LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust11 May 2024
- 2024TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojans9 May 2024
- 2022Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs29 Nov 2022