mlsanityData to 14 Oct 2026

Protect Your Chip Design Intellectual Property: An Overview

arXiv 1902.05333 ↗First posted 14 Feb 2019cs.CRcited by 4

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Abstract (arXiv)

The increasing cost of integrated circuit (IC) fabrication has driven most companies to "go fabless" over time. The corresponding outsourcing trend gave rise to various attack vectors, e.g., illegal overproduction of ICs, piracy of the design intellectual property (IP), or insertion of hardware Trojans (HTs). These attacks are possibly conducted by untrusted entities residing all over the supply chain, ranging from untrusted foundries, test facilities, even to end-users. To overcome this multitude of threats, various techniques have been proposed over the past decade. In this paper, we review the landscape of IP protection techniques, which can be classified into logic locking, layout camouflaging, and split manufacturing. We discuss the history of these techniques, followed by state-of-the-art advancements, relevant limitations, and scope for future work.

Key facts. Cited by 4 papers in the map (data through 14 Oct 2026). First posted on arXiv 14 Feb 2019.

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Citing papers per year: 2022: 2; 2023: 0; 2024: 1; 2025: 1.

4 papers.