GANAX: A Unified MIMD-SIMD Acceleration for Generative Adversarial Networks
Not on the map. Why?
Abstract (arXiv)
Generative Adversarial Networks (GANs) are one of the most recent deep learning models that generate synthetic data from limited genuine datasets. GANs are on the frontier as further extension of deep learning into many domains (e.g., medicine, robotics, content synthesis) requires massive sets of labeled data that is generally either unavailable or prohibitively costly to collect. Although GANs are gaining prominence in various fields, there are no accelerators for these new models. In fact, GANs leverage a new operator, called transposed convolution, that exposes unique challenges for hardware acceleration. This operator first inserts zeros within the multidimensional input, then convolves a kernel over this expanded array to add information to the embedded zeros. Even though there is a convolution stage in this operator, the inserted zeros lead to underutilization of the compute resources when a conventional convolution accelerator is employed. We propose the GANAX architecture to alleviate the sources of inefficiency associated with the acceleration of GANs using conventional convolution accelerators, making the first GAN accelerator design possible. We propose a reorganization of the output computations to allocate compute rows with similar patterns of zeros to adjacent processing engines, which also avoids inconsequential multiply-adds on the zeros. This compulsory adjacency reclaims data reuse across these neighboring processing engines, which had otherwise diminished due to the inserted zeros. The reordering breaks the full SIMD execution model, which is prominent in convolution accelerators. Therefore, we propose a unified MIMD-SIMD design for GANAX that leverages repeated patterns in the computation to create distinct microprograms that execute concurrently in SIMD mode.
Key facts. Cited by 11 papers in the map (data through 7 Oct 2026). First posted on arXiv 10 May 2018.
Builds on
No reference list yet.
Built on by
Citing papers per year: 2021: 4; 2022: 2; 2023: 1; 2024: 2; 2025: 2.
11 papers.
- 2021FLAT: An Optimized Dataflow for Mitigating Attention Bottleneckscited by 38
- 2021Mind Mappings: Enabling Efficient Algorithm-Accelerator Mapping Space Searchcited by 24
- 2023A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platformscited by 21
- 2024Generative AI for the Optimization of Next-Generation Wireless Networks: Basics, State-of-the-Art, and Open Challengescited by 14
- 2021A Competitive Edge: Can FPGAs Beat GPUs at DCNN Inference Acceleration in Resource-Limited Edge Computing Applications?cited by 6
- 2021Rethinking Floating Point Overheads for Mixed Precision DNN Acceleratorscited by 3
- 2022EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Acceleratorscited by 1
- 2022Kernel-Segregated Transpose Convolution Operationcited by 1
- 2025PhotoGAN: Generative Adversarial Neural Network Acceleration with Silicon Photonicscited by 1
- 2024Register Your Forests: Decision Tree Ensemble Optimization by Explicit CPU Register Allocationcited by 0
- 2025Unified Kernel-Segregated Transpose Convolution Operationcited by 0
- 2025Unified Kernel-Segregated Transpose Convolution Operation27 Feb 2025
- 2025PhotoGAN: Generative Adversarial Neural Network Acceleration with Silicon Photonics23 Jan 2025
- 2024Generative AI for the Optimization of Next-Generation Wireless Networks: Basics, State-of-the-Art, and Open Challenges22 May 2024
- 2024Register Your Forests: Decision Tree Ensemble Optimization by Explicit CPU Register Allocation10 Apr 2024
- 2023A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms27 Jun 2023
- 2022Kernel-Segregated Transpose Convolution Operation8 Sep 2022
- 2022EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Accelerators4 Feb 2022
- 2021FLAT: An Optimized Dataflow for Mitigating Attention Bottlenecks13 Jul 2021
- 2021Mind Mappings: Enabling Efficient Algorithm-Accelerator Mapping Space Search2 Mar 2021
- 2021A Competitive Edge: Can FPGAs Beat GPUs at DCNN Inference Acceleration in Resource-Limited Edge Computing Applications?30 Jan 2021
- 2021Rethinking Floating Point Overheads for Mixed Precision DNN Accelerators27 Jan 2021