Optimizing Memory Efficiency for Deep Convolutional Neural Networks on GPUs
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Abstract (arXiv)
Leveraging large data sets, deep Convolutional Neural Networks (CNNs) achieve state-of-the-art recognition accuracy. Due to the substantial compute and memory operations, however, they require significant execution time. The massive parallel computing capability of GPUs make them as one of the ideal platforms to accelerate CNNs and a number of GPU-based CNN libraries have been developed. While existing works mainly focus on the computational efficiency of CNNs, the memory efficiency of CNNs have been largely overlooked. Yet CNNs have intricate data structures and their memory behavior can have significant impact on the performance. In this work, we study the memory efficiency of various CNN layers and reveal the performance implication from both data layouts and memory access patterns. Experiments show the universal effect of our proposed optimizations on both single layers and various networks, with up to 27.9x for a single layer and up to 5.6x on the whole networks.
Key facts. Cited by 7 papers in the map (data through 14 Oct 2026). First posted on arXiv 12 Oct 2016.
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Citing papers per year: 2021: 2; 2022: 1; 2023: 0; 2024: 3; 2025: 0; 2026: 1.
7 papers.
- 2021A Data-Centric Optimization Framework for Machine Learningcited by 3
- 2021cuConv: A CUDA Implementation of Convolution for CNN Inferencecited by 1
- 2024High Performance Im2win and Direct Convolutions using Three Tensor Layouts on SIMD Architecturescited by 1
- 2026Enabling Memory-efficient Im2win Convolution with Multi-precision Support on GPU CUDA and Tensor Corescited by 1
- 2022ALT: Boosting Deep Learning Performance by Breaking the Wall between Graph and Operator Level Optimizationscited by 0
- 2024Optimal Kernel Tuning Parameter Prediction using Deep Sequence Modelscited by 0
- 2024A Configurable and Efficient Memory Hierarchy for Neural Network Hardware Acceleratorcited by 0
- 2026Enabling Memory-efficient Im2win Convolution with Multi-precision Support on GPU CUDA and Tensor Cores21 Aug 2026
- 2024High Performance Im2win and Direct Convolutions using Three Tensor Layouts on SIMD Architectures1 Aug 2024
- 2024A Configurable and Efficient Memory Hierarchy for Neural Network Hardware Accelerator24 Apr 2024
- 2024Optimal Kernel Tuning Parameter Prediction using Deep Sequence Models15 Apr 2024
- 2022ALT: Boosting Deep Learning Performance by Breaking the Wall between Graph and Operator Level Optimizations22 Oct 2022
- 2021A Data-Centric Optimization Framework for Machine Learning20 Oct 2021
- 2021cuConv: A CUDA Implementation of Convolution for CNN Inference30 Mar 2021