mlsanityData to 14 Oct 2026

Deep Microcompression: Structured Pruning and Bit-packed Quantization for Microcontrollers

arXiv 2609.05081 ↗First posted 4 Sep 2026cs.LGcited by 1

Not on the map. Why?

Abstract (arXiv)

This paper introduces Deep Microcompression (DMC), a hardware-aware pipeline for deep learning inference on bare-metal microcontrollers. DMC integrates structured pruning, quantization-aware training, and fixed-length bit-packing to achieve a 55.8× weight compression ratio on LeNet-5 (98.77% accuracy), generating a dependency-free C library with deterministic latency. On the RP2040 (Cortex-M0+), DMC reduces binary size by 3× versus TensorFlow Lite while matching its accuracy. Critically, DMC enables the first documented deployment of a standard CNN on the ATmega328P, a device constrained to 2KB SRAM, previously considered infeasible for CNN inference.

Key facts. Cited by 1 paper in the map (data through 14 Oct 2026). Builds on 13 of its 21 references that are in the map. First posted on arXiv 4 Sep 2026.

Builds on

13 of 21 references.

References · 13

  1. 2015Deep Compression: Compressing Deep Neural Networks with Pruning, Trained Quantization and Huffman Codingcited by 2,329
  2. 2018The Lottery Ticket Hypothesis: Finding Sparse, Trainable Neural Networkscited by 2,262
  3. 2016Pruning Filters for Efficient ConvNetscited by 1,143
  4. 2017Learning Efficient Convolutional Networks through Network Slimmingcited by 676
  5. 2017To prune, or not to prune: exploring the efficacy of pruning for model compressioncited by 603
  6. 2018Rethinking the Value of Network Pruningcited by 599
  7. 2019The State of Sparsity in Deep Neural Networkscited by 476
  8. 2017ThiNet: A Filter Level Pruning Method for Deep Neural Network Compressioncited by 442
  9. 2016Trained Ternary Quantizationcited by 208
  10. 2023TorchSparse++: Efficient Training and Inference Framework for Sparse Convolution on GPUscited by 36
  11. 2018Automating Generation of Low Precision Deep Learning Operatorscited by 6
  12. 2021Recognition of handwritten MNIST digits on low-memory 2 Kb RAM Arduino board using LogNNet reservoir neural networkcited by 6
1 more
  1. 2022Bit-serial Weight Pools: Compression and Arbitrary Precision Execution of Neural Networks on Resource Constrained Processorscited by 3

Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2026: 1.

1 paper.

  1. 2026Right In-Place (RiP) Convolution: A Simple, General, and Near-Optimal Strategy for Memory-Efficient CNN Inferencecited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2026From Compression to Deployment: Real-Time and Energy-Efficient FastGRNN on Ultra-Constrained Microcontrollers
  2. 2022Energy-efficient Deployment of Deep Learning Applications on Cortex-M based Microcontrollers using Deep Compression
  3. 2023Hardware-Aware DNN Compression via Diverse Pruning and Mixed-Precision Quantization
  4. 2021Deep Compression for PyTorch Model Deployment on Microcontrollers
  5. 2025Neural Network Quantization for Microcontrollers: A Comprehensive Survey of Methods, Platforms, and Applications
  6. 2026Once-for-All Channel Mixers (HYPERTINYPW): Generative Compression for TinyML
  7. 202616-bit Precision of Convolutional Neural Networks on Microcontroller Units for 8-bit Costs
  8. 2021Quantization and Deployment of Deep Neural Networks on Microcontrollers