Hardware Acceleration of Block-Diffusion LLM for Edge Devices
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Abstract (arXiv)
Single-stream (batch-one) edge inference cannot amortize weight traffic across requests. Full-attention diffusion LLMs recompute the entire sequence at every step; native block diffusion makes completed blocks immutable and exactly cacheable, yet refinement still streams prefix KV and FFN weights. We co-design WIFiV-LPDDR, a wide-I/O LPDDR system for precision-tagged reads, BRQ-KV for a canonical low-rank-plus-INT8-residual prefix with query-dependent per-entry precision, and DAT-FFN for drift-mapped canonical replacement, adjacent-stage-corrected low-bit delta, or cached-state carry while keeping live activations unquantized. Both map to an input-stationary mixed-precision systolic array. For the evaluated 1.5B/7B models on modeled Jetson-class platforms, the full stack provides arithmetic-mean energy-reduction factors of 3.79x/3.96x and arithmetic-mean latency speedups of 2.88x/4.44x at the reported DAT-FFN settings; every corresponding compressed model-benchmark score drops by less than one absolute percentage point from its baseline.
Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 9 of its 12 references that are in the map. First posted on arXiv 1 Sep 2026.
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9 of 12 references.
References · 9
- 2022GPTQ: Accurate Post-Training Quantization for Generative Pre-trained Transformerscited by 1,919
- 2025Large Language Diffusion Modelscited by 912
- 2025Fast-dLLM v2: Efficient Block-Diffusion LLMcited by 139
- 2025Characterizing Mobile SoC for Accelerating Heterogeneous LLM Inferencecited by 22
- 2025Chipmunk: Training-Free Acceleration of Diffusion Transformers with Dynamic Column-Sparse Deltascited by 8
- 2021Rethinking Floating Point Overheads for Mixed Precision DNN Acceleratorscited by 4
- 2026MAGE: All-[MASK] Block Already Knows Where to Look in Block Diffusion LLMcited by 2
- 2026DSTAR: Accelerating Diffusion Transformers via Spatial and Temporal Redundancy Reductioncited by 1
- 2026LLMET: Enabling Cross-Layer Evaluation of Emerging M3D Memories for Energy-Efficient LLM Servingcited by 1
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- 2026UnionSparse: An Index-Efficient Sparsity Framework for Low-Bit Sparse LLM Inference on Edge
- 2026SHIELD: A Segmented Hierarchical Memory Architecture for Energy-Efficient LLM Inference on Edge NPUs
- 2026HBQ: Hierarchical Scaling Block Quantization with Hardware-Efficiency-Aware Design for Accurate LLM Inference
- 2026Hydra: Phase-Aware Workload Characterization of LLM Inference across Edge SoC Generations, Backends, and Quantization Levels
- 2026BlockServe: Block-Grained Continuous Batching for High-Throughput Diffusion LLM Serving
- 2026PRISM: Breaking the O(n) Memory Wall in Long-Context LLM Inference via O(1) Photonic Block Selection
- 2026Efficient On-Device Diffusion LLM Inference with Mobile NPU
- 2026PALUTE: Processing-In-Memory Acceleration via Lookup Table for Edge LLM Inference