PolyQ: Codesigning End-to-End Quantization Framework for Scalable Edge CPU LLM Inference
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Abstract (arXiv)
CPUs are the most universal target for on-device LLM inference, but existing low-bit quantization methods offer either coarse operating points or fine-grained mixed precision that is difficult to execute efficiently on CPUs. We present PolyQ, a CPU-oriented compiler/quantization co-design for activation-aware channel-wise bit allocation under a user-specified average-bit budget. PolyQ assigns per-channel bit-widths from 2,3,4,8,16, then uses a compile-time model compiler to permute and cluster channels into bit-homogeneous blocks, generate SIMD- and LUT-compatible kernels, and merge compatible permutations across operators to keep layout regularization off the runtime path. This turns fine-grained budget fitting into a practical fractional-bit deployment method for CPU-only inference. Across Falcon-H1-3B, Llama2-13B, and Qwen3-32B on WikiText-2, PolyQ provides stable quality scaling from 3--6,b and improves perplexity by 2.4--32.1% over prior methods at a 3,b target. End-to-end measurements on three representative CPUs -- workstation, laptop, and mobile -- show that compiler layout regularization reduces activation reorder traffic by up to 70.8%, prefill latency and decode throughput scale nearly proportionally with the configured bit budget, and energy/token overhead stays below 2% relative to an optimized LUT-based back-end. These results show that fractional-bit CPU deployment is practical, predictable, and energy-efficient across diverse edge targets.
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References · 17
- 2023Llama 2: Open Foundation and Fine-Tuned Chat Modelscited by 13,028
- 2020Measuring Massive Multitask Language Understandingcited by 7,963
- 2019HellaSwag: Can a Machine Really Finish Your Sentence?cited by 4,100
- 2016Pointer Sentinel Mixture Modelscited by 3,096
- 2022GPTQ: Accurate Post-Training Quantization for Generative Pre-trained Transformerscited by 1,919
- 2023AWQ: Activation-aware Weight Quantization for LLM Compression and Accelerationcited by 1,298
- 2018HAQ: Hardware-Aware Automated Quantization with Mixed Precisioncited by 443
- 2023Atom: Low-bit Quantization for Efficient and Accurate LLM Servingcited by 272
- 2023LLM in a flash: Efficient Large Language Model Inference with Limited Memorycited by 177
- 2024A Review on Edge Large Language Models: Design, Execution, and Applicationscited by 100
- 2024Fast On-device LLM Inference with NPUscited by 62
- 2024T-MAC: CPU Renaissance via Table Lookup for Low-Bit LLM Deployment on Edgecited by 55
5 more
- 2025Bitnet.cpp: Efficient Edge Inference for Ternary LLMscited by 22
- 2025Ecco: Improving Memory Bandwidth and Capacity for LLMs via Entropy-aware Cache Compressioncited by 14
- 2025AMQ: Enabling AutoML for Mixed-precision Weight-Only Quantization of Large Language Modelscited by 14
- 2025T-SAR: A Full-Stack Co-design for CPU-Only Ternary LLM Inference via In-Place SIMD ALU Reorganizationcited by 4
- 2024GCV-Turbo: End-to-end Acceleration of GNN-based Computer Vision Tasks on FPGAcited by 2
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