Average Attention Transformers and Arithmetic Circuits
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Abstract (arXiv)
We analyse the computational power of transformer encoders as sequence-to-sequence functions on vectors. We show that average hard attention can be used to simulate arithmetic circuits if they are given as an input to an encoder. The circuit families that can be simulated this way have constant depth while using unbounded addition, binary multiplication and sign gates. The transformers we use have arithmetic circuits instead of feed-forward networks. With typical average attention the functions they compute are also computed by the same class of circuit families. Our results hold for transformers over the reals, rationals and any ring in between the two.
Key facts. No citing papers in the map yet (data through 7 Oct 2026). Builds on 8 of its 12 references that are in the map. First posted on arXiv 6 May 2026.
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References · 8
- 2017Attention Is All You Needcited by 59,932
- 2022The Parallelism Tradeoff: Limitations of Log-Precision Transformerscited by 191
- 2022Formal Language Recognition by Hard Attention Transformers: Perspectives from Circuit Complexitycited by 92
- 2023Tighter Bounds on the Expressivity of Transformer Encoderscited by 65
- 2023Masked Hard-Attention Transformers Recognize Exactly the Star-Free Languagescited by 47
- 2023Logical Languages Accepted by Transformer Encoders with Hard Attentioncited by 37
- 2023Average-Hard Attention Transformers are Constant-Depth Uniform Threshold Circuitscited by 26
- 2024Graph Neural Networks and Arithmetic Circuitscited by 3
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