PrefixGPT: Prefix Adder Optimization by a Generative Pre-trained Transformer
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Abstract (arXiv)
Prefix adders are widely used in compute-intensive applications for their high speed. However, designing optimized prefix adders is challenging due to strict design rules and an exponentially large design space. We introduce PrefixGPT, a generative pre-trained Transformer (GPT) that directly generates optimized prefix adders from scratch. Our approach represents an adder's topology as a two-dimensional coordinate sequence and applies a legality mask during generation, ensuring every design is valid by construction. PrefixGPT features a customized decoder-only Transformer architecture. The model is first pre-trained on a corpus of randomly synthesized valid prefix adders to learn design rules and then fine-tuned to navigate the design space for optimized design quality. Compared with existing works, PrefixGPT not only finds a new optimal design with a 7.7% improved area-delay product (ADP) but exhibits superior exploration quality, lowering the average ADP by up to 79.1%. This demonstrates the potential of GPT-style models to first master complex hardware design principles and then apply them for more efficient design optimization.
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References · 11
- 2017Proximal Policy Optimization Algorithmscited by 14,592
- 2023LLaMA: Open and Efficient Foundation Language Modelscited by 14,072
- 2024DeepSeekMath: Pushing the Limits of Mathematical Reasoning in Open Language Modelscited by 9,091
- 2021RoFormer: Enhanced Transformer with Rotary Position Embeddingcited by 4,628
- 2020Learning to summarize from human feedbackcited by 2,575
- 2019Root Mean Square Layer Normalizationcited by 1,449
- 2023ChemCrow: Augmenting large-language models with chemistry toolscited by 622
- 2022BioGPT: Generative Pre-trained Transformer for Biomedical Text Generation and Miningcited by 536
- 2024Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designscited by 9
- 2018Cross-layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approachcited by 7
- 2024CircuitVAE: Efficient and Scalable Latent Circuit Optimizationcited by 4
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