ParallelKittens: Systematic and Practical Simplification of Multi-GPU AI Kernels
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Abstract (arXiv)
Inter-GPU communication has become a major bottleneck for modern AI workloads as models scale and improvements in hardware compute throughput outpace improvements in interconnect bandwidth. Existing systems mitigate this through compute-communication overlap but often fail to meet theoretical peak performance across heterogeneous workloads and new accelerators. Instead of operator-specific techniques, we ask whether a small set of simple, reusable principles can systematically guide the design of optimal multi-GPU kernels. We present ParallelKittens (PK), a minimal CUDA framework that drastically simplifies the development of overlapped multi-GPU kernels. PK extends the ThunderKittens framework and embodies the principles of multi-GPU kernel design through eight core primitives and a unified programming template, derived from a comprehensive analysis of the factors that govern multi-GPU performanceunicodex2014data-transfer mechanisms, resource scheduling, and design overheads. We validate PK on both Hopper and Blackwell architectures. With fewer than 50 lines of device code, PK achieves up to 2.33 × speedup for data- and tensor-parallel workloads, 4.08 × for sequence-parallel workloads, and 1.22 × for expert-parallel workloads.
Key facts. Cited by 12 papers in the map (data through 14 Oct 2026). First posted on arXiv 17 Nov 2025.
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Citing papers per year: 2025: 1; 2026: 11.
12 papers.
- 2026Composer 2 Technical Reportcited by 22
- 2025MPK: A Compiler and Runtime for Mega-Kernelizing Tensor Programscited by 15
- 2026CODA: Rewriting Transformer Blocks as GEMM-Epilogue Programscited by 5
- 2026CUCo: An Agentic Framework for Compute and Communication Co-designcited by 2
- 2026Laguna M.1/XS.2 Technical Reportcited by 1
- 2026CTA-Pipelining: A Latency-Oriented Spatial Scaling Method for Multi-GPU Systemscited by 0
- 2026X-Stage: Modeling Post-Issue Backpressure in GPU Communication--Computation Fusioncited by 0
- 2026mKernel: Fast Multi-GPU, Multi-Node Fused Kernelscited by 0
- 2026Mixture-of-Kittens: MoE Megakernel for NVL72scited by 0
- 2026AI as a Compiler: Compiling Triton kernels without the Triton compilercited by 0
- 2026Purlin: Separating Orchestration from the Datapath of Collectivescited by 0
- 2026T-CCL: Resource Efficient and Performant Collective Communication using Tensor Memory Acceleratorcited by 0
- 2026T-CCL: Resource Efficient and Performant Collective Communication using Tensor Memory Accelerator5 Oct 2026
- 2026Purlin: Separating Orchestration from the Datapath of Collectives29 Sep 2026
- 2026AI as a Compiler: Compiling Triton kernels without the Triton compiler29 Sep 2026
- 2026Mixture-of-Kittens: MoE Megakernel for NVL72s28 Sep 2026
- 2026mKernel: Fast Multi-GPU, Multi-Node Fused Kernels11 Sep 2026
- 2026X-Stage: Modeling Post-Issue Backpressure in GPU Communication--Computation Fusion25 Jul 2026
- 2026CTA-Pipelining: A Latency-Oriented Spatial Scaling Method for Multi-GPU Systems8 Jul 2026
- 2026Laguna M.1/XS.2 Technical Report26 May 2026
- 2026CODA: Rewriting Transformer Blocks as GEMM-Epilogue Programs19 May 2026
- 2026Composer 2 Technical Report25 Mar 2026
- 2026CUCo: An Agentic Framework for Compute and Communication Co-design2 Mar 2026
- 2025MPK: A Compiler and Runtime for Mega-Kernelizing Tensor Programs22 Dec 2025