mlsanityData to 7 Oct 2026

Accelerating Latency-Critical Applications with AI-Powered Semi-Automatic Fine-Grained Parallelization on SMT Processors

arXiv 2509.00883 ↗First posted 31 Aug 2025cs.DC cs.AIcited by 0

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Abstract (arXiv)

Latency-critical applications tend to show low utilization of functional units due to frequent cache misses and mispredictions during speculative execution in high-performance superscalar processors. However, due to significant impact on single-thread performance, Simultaneous Multithreading (SMT) technology is rarely used with heavy threads of latency-critical applications. In this paper, we explore utilization of SMT technology to support fine-grained parallelization of latency-critical applications. Following the advancements in the development of Large Language Models (LLMs), we introduce Aira, an AI-powered Parallelization Adviser. To implement Aira, we extend AI Coding Agent in Cursor IDE with additional tools connected through Model Context Protocol, enabling end-to-end AI Agent for parallelization. Additional connected tools enable LLM-guided hotspot detection, collection of dynamic dependencies with Dynamic Binary Instrumentation, SMT-aware performance simulation to estimate performance gains. We apply Aira with Relic parallel framework for fine-grained task parallelism on SMT cores to parallelize latency-critical benchmarks representing real-world applications used in industry. We show 17% geomean performance gain from parallelization of latency-critical benchmarks using Aira with Relic framework.

Key facts. No citing papers in the map yet (data through 7 Oct 2026). Builds on 7 of its 25 references that are in the map. First posted on arXiv 31 Aug 2025.

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References · 7

  1. 2024Can Large Language Models Write Parallel Code?cited by 36
  2. 2024OMPGPT: A Generative Pre-trained Transformer Model for OpenMPcited by 16
  3. 2023Learning to Parallelize with OpenMP by Augmented Heterogeneous AST Representationcited by 14
  4. 2023MonoCoder: Domain-Specific Code Language Model for HPC Codes and Taskscited by 12
  5. 2023Advising OpenMP Parallelization via a Graph-Based Approach with Transformerscited by 10
  6. 2024OMPar: Automatic Parallelization with AI-Driven Source-to-Source Compilationcited by 5
  7. 2024Exploring Fine-grained Task Parallelism on Simultaneous Multithreading Corescited by 1

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  2. 2026AIRA_2: Overcoming Bottlenecks in AI Research Agents
  3. 2026Parallelization Strategies for Dense LLM Deployment: Navigating Through Application-Specific Tradeoffs and Bottlenecks
  4. 2024APEX: An Extensible and Dynamism-Aware Simulator for Automated Parallel Execution in LLM Serving
  5. 2025Faster and Better LLMs via Latency-Aware Test-Time Scaling
  6. 2026AI Hardware Accelerators for Large Language Models: Architectures and the Memory Wall ↗
  7. 2025Small Language Models as Compiler Experts: Auto-Parallelization for Heterogeneous Systems
  8. 2026ParBench: A Benchmark for Reliable Evaluation of LLM Parallel Code Translation