Efficiency, Expressivity, and Extensibility in a Close-to-Metal NPU Programming Interface
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Abstract (arXiv)
Accelerators such as neural processing units (NPUs) deliver an enticing balance of performance and efficiency compared to general purpose compute architectures. However, effectively leveraging accelerator capabilities is not always simple: low-level programming toolkits may require substantial developer effort while high-level programming toolkits may abstract critical optimization features. This work aims to increase efficiency of designers using IRON, a toolkit for close-to-metal NPU performance engineers. We provide an updated programmer interface to IRON containing new and refined programming constructs. The new interface includes extensible features for placement and data transformation. These contributions are evaluated in terms of 1) efficiency, with analysis showing ~26% average reduction in lines of code and decreases in Halstead metrics for a variety of designs; 2) expressivity, demonstrating the new interface supports the wide range of features and patterns already supported by IRON; and 3) extensibility, illustrating the new tooling for placement and tiling can be extended to accommodate common use-cases.
Key facts. Cited by 9 papers in the map (data through 14 Oct 2026). First posted on arXiv 25 Apr 2025.
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Citing papers per year: 2025: 3; 2026: 6.
9 papers.
- 2025Dato: A Task-Based Programming Model for Dataflow Acceleratorscited by 5
- 2025AIE4ML: An End-to-End Framework for Compiling Neural Networks for the Next Generation of AMD AI Enginescited by 5
- 2025From Loop Nests to Silicon: Mapping AI Workloads onto AMD NPUs with MLIR-AIRcited by 2
- 2026Mapping Gemma3 onto an Edge Dataflow Architecturecited by 2
- 2026From Human Guidance to Autonomy: Agent Skill System for End-to-End LLM Deployment on Spatial NPUscited by 2
- 2026Taming the Exponential: A Fast Softmax Surrogate for Integer-Native Edge Inferencecited by 0
- 2026TileFuse: A Fused Mixed-Precision Kernel Library for Efficient Quantized LLM Inference on AMD NPUscited by 0
- 2026STEEL: Sparsity-Aware Fused Attention for Energy-Efficient Long-Sequence Inference on AMD's XDNA NPUcited by 0
- 2026Programming AMD XDNA NPUs with Open-source Compiler Tools: A FlashAttention Case Studycited by 0
- 2026Programming AMD XDNA NPUs with Open-source Compiler Tools: A FlashAttention Case Study18 Sep 2026
- 2026STEEL: Sparsity-Aware Fused Attention for Energy-Efficient Long-Sequence Inference on AMD's XDNA NPU10 Jul 2026
- 2026TileFuse: A Fused Mixed-Precision Kernel Library for Efficient Quantized LLM Inference on AMD NPUs9 Jun 2026
- 2026From Human Guidance to Autonomy: Agent Skill System for End-to-End LLM Deployment on Spatial NPUs27 May 2026
- 2026Taming the Exponential: A Fast Softmax Surrogate for Integer-Native Edge Inference2 Apr 2026
- 2026Mapping Gemma3 onto an Edge Dataflow Architecture27 Jan 2026
- 2025AIE4ML: An End-to-End Framework for Compiling Neural Networks for the Next Generation of AMD AI Engines17 Dec 2025
- 2025From Loop Nests to Silicon: Mapping AI Workloads onto AMD NPUs with MLIR-AIR16 Oct 2025
- 2025Dato: A Task-Based Programming Model for Dataflow Accelerators8 Sep 2025