Optimizing FDTD Solvers for Electromagnetics: A Compiler-Guided Approach with High-Level Tensor Abstractions
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Abstract (arXiv)
The Finite Difference Time Domain (FDTD) method is a widely used numerical technique for solving Maxwell's equations, particularly in computational electromagnetics and photonics. It enables accurate modeling of wave propagation in complex media and structures but comes with significant computational challenges. Traditional FDTD implementations rely on handwritten, platform-specific code that optimizes certain kernels while underperforming in others. The lack of portability increases development overhead and creates performance bottlenecks, limiting scalability across modern hardware architectures. To address these challenges, we introduce an end-to-end domain-specific compiler based on the MLIR/LLVM infrastructure for FDTD simulations. Our approach generates efficient and portable code optimized for diverse hardware platforms.We implement the three-dimensional FDTD kernel as operations on a 3D tensor abstraction with explicit computational semantics. High-level optimizations such as loop tiling, fusion, and vectorization are automatically applied by the compiler. We evaluate our customized code generation pipeline on Intel, AMD, and ARM platforms, achieving up to 10× speedup over baseline Python implementation using NumPy.
Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 6 of its 29 references that are in the map. First posted on arXiv 12 Apr 2025.
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References · 6
- 2019A Data-Centric Approach to Extreme-Scale Ab initio Dissipative Quantum Transport Simulationscited by 11
- 2020Domain-Specific Multi-Level IR Rewriting for GPUcited by 9
- 2022FFTc: An MLIR Dialect for Developing HPC Fast Fourier Transform Librariescited by 1
- 2022An Open Platform for Simulating the Physical Layer of 6G Communication Systems with Multiple Intelligent Surfacescited by 1
- 2023Bridging Control-Centric and Data-Centric Optimizationcited by 1
- 2023Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGAcited by 1
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