Task-Based Tensor Computations on Modern GPUs
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Abstract (arXiv)
Domain-specific, fixed-function units are becoming increasingly common in modern processors. As the computational demands of applications evolve, the capabilities and programming interfaces of these fixed-function units continue to change. NVIDIA's Hopper GPU architecture contains multiple fixed-function units per compute unit, including an asynchronous data movement unit (TMA) and an asynchronous matrix multiplication unit (Tensor Core). Efficiently utilizing these units requires a fundamentally different programming style than previous architectures; programmers must now develop warp-specialized kernels that orchestrate producer-consumer pipelines between the asynchronous units. To manage the complexity of programming these new architectures, we introduce Cypress, a task-based programming model with sequential semantics. Cypress programs are a set of designated functions called tasks that operate on tensors and are free of communication and synchronization. Cypress programs are bound to the target machine through a mapping specification that describes where tasks should run and in which memories tensors should be materialized. We present a compiler architecture that lowers Cypress programs into CUDA programs that perform competitively with expert-written codes. Cypress achieves 0.88x-1.06x the performance of cuBLAS on GEMM, and between 0.80x-0.98x the performance of the currently best-known Flash Attention implementation while eliminating all aspects of explicit data movement and asynchronous computation from application code.
Key facts. Cited by 4 papers in the map (data through 14 Oct 2026). First posted on arXiv 9 Apr 2025.
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Citing papers per year: 2025: 3; 2026: 1.
4 papers.
- 2025Tawa: Automatic Warp Specialization for Modern GPUs with Asynchronous Referencescited by 6
- 2025Optimal Software Pipelining and Warp Specialization for Tensor Core GPUscited by 5
- 2026Event Tensor: A Unified Abstraction for Compiling Dynamic Megakernelcited by 4
- 2025Hexcute: A Compiler Framework for Automating Layout Synthesis in GPU Programscited by 2
- 2026Event Tensor: A Unified Abstraction for Compiling Dynamic Megakernel14 Apr 2026
- 2025Optimal Software Pipelining and Warp Specialization for Tensor Core GPUs19 Dec 2025
- 2025Tawa: Automatic Warp Specialization for Modern GPUs with Asynchronous References16 Oct 2025
- 2025Hexcute: A Compiler Framework for Automating Layout Synthesis in GPU Programs22 Apr 2025