Semiconductor Wafer Map Defect Classification with Tiny Vision Transformers
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Abstract (arXiv)
Semiconductor wafer defect classification is critical for ensuring high precision and yield in manufacturing. Traditional CNN-based models often struggle with class imbalances and recognition of the multiple overlapping defect types in wafer maps. To address these challenges, we propose ViT-Tiny, a lightweight Vision Transformer (ViT) framework optimized for wafer defect classification. Trained on the WM-38k dataset. ViT-Tiny outperforms its ViT-Base counterpart and state-of-the-art (SOTA) models, such as MSF-Trans and CNN-based architectures. Through extensive ablation studies, we determine that a patch size of 16 provides optimal performance. ViT-Tiny achieves an F1-score of 98.4%, surpassing MSF-Trans by 2.94% in four-defect classification, improving recall by 2.86% in two-defect classification, and increasing precision by 3.13% in three-defect classification. Additionally, it demonstrates enhanced robustness under limited labeled data conditions, making it a computationally efficient and reliable solution for real-world semiconductor defect detection.
Key facts. Cited by 1 paper in the map (data through 7 Oct 2026). Builds on 10 of its 39 references that are in the map. First posted on arXiv 3 Apr 2025.
Builds on
10 of 39 references.
References · 10
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- 2022Semiconductor Defect Detection by Hybrid Classical-Quantum Deep Learningcited by 16
- 2022WaferSegClassNet -- A Light-weight Network for Classification and Segmentation of Semiconductor Wafer Defectscited by 7
- 2024Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAScited by 2
- 2022Semiconductor Defect Pattern Classification by Self-Proliferation-and-Attention Neural Networkcited by 1
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Citing papers per year: 2026: 1.
1 paper.