ROMA: a Read-Only-Memory-based Accelerator for QLoRA-based On-Device LLM
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Abstract (arXiv)
As large language models (LLMs) demonstrate powerful capabilities, deploying them on edge devices has become increasingly crucial, offering advantages in privacy and real-time interaction. QLoRA has emerged as the standard approach for on-device LLMs, leveraging quantized models to reduce memory and computational costs while utilizing LoRA for task-specific adaptability. In this work, we propose ROMA, a QLoRA accelerator with a hybrid storage architecture that uses ROM for quantized base models and SRAM for LoRA weights and KV cache. Our insight is that the quantized base model is stable and converged, making it well-suited for ROM storage. Meanwhile, LoRA modules offer the flexibility to adapt to new data without requiring updates to the base model. To further reduce the area cost of ROM, we introduce a novel B-ROM design and integrate it with the compute unit to form a fused cell for efficient use of chip resources. ROMA can effectively store both a 4-bit 3B and a 2-bit 8B LLaMA model entirely on-chip, achieving a notable generation speed exceeding 20,000 tokens/s without requiring external memory.
Key facts. Cited by 1 paper in the map (data through 14 Oct 2026). Builds on 16 of its 31 references that are in the map. First posted on arXiv 17 Mar 2025.
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16 of 31 references.
References · 16
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4 more
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Citing papers per year: 2026: 1.
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- 2024LlamaF: An Efficient Llama2 Architecture Accelerator on Embedded FPGAs
- 2025A Systematic Evaluation of On-Device LLMs: Quantization, Performance, and Resources
- 2025EdgeLoRA: An Efficient Multi-Tenant LLM Serving System on Edge Devices
- 2025TeLLMe: An Energy-Efficient Ternary LLM Accelerator for Prefilling and Decoding on Edge FPGAs
- 2026Unlocking the Edge deployment and ondevice acceleration of multi-LoRA enabled one-for-all foundational LLM
- 2025BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference
- 2025TeLLMe v2: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs
- 2025On-Device Qwen2.5: Efficient LLM Inference with Model Compression and Hardware Acceleration