TSkips: Efficiency Through Explicit Temporal Delay Connections in Spiking Neural Networks
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Abstract (arXiv)
Spiking Neural Networks (SNNs) with their bio-inspired Leaky Integrate-and-Fire (LIF) neurons inherently capture temporal information. This makes them well-suited for sequential tasks like processing event-based data from Dynamic Vision Sensors (DVS) and event-based speech tasks. Harnessing the temporal capabilities of SNNs requires mitigating vanishing spikes during training, capturing spatio-temporal patterns and enhancing precise spike timing. To address these challenges, we propose TSkips, augmenting SNN architectures with forward and backward skip connections that incorporate explicit temporal delays. These connections capture long-term spatio-temporal dependencies and facilitate better spike flow over long sequences. The introduction of TSkips creates a vast search space of possible configurations, encompassing skip positions and time delay values. To efficiently navigate this search space, this work leverages training-free Neural Architecture Search (NAS) to identify optimal network structures and corresponding delays. We demonstrate the effectiveness of our approach on four event-based datasets: DSEC-flow for optical flow estimation, DVS128 Gesture for hand gesture recognition and Spiking Heidelberg Digits (SHD) and Spiking Speech Commands (SSC) for speech recognition. Our method achieves significant improvements across these datasets: up to 18% reduction in Average Endpoint Error (AEE) on DSEC-flow, 8% increase in classification accuracy on DVS128 Gesture, and up to 8% and 16% higher classification accuracy on SHD and SSC, respectively.
Key facts. Cited by 4 papers in the map (data through 14 Oct 2026). First posted on arXiv 22 Nov 2024.
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Citing papers per year: 2025: 1; 2026: 3.
4 papers.
- 2026Hardware-accelerated graph neural networks: an alternative approach for neuromorphic event-based audio classification and keyword spotting on SoC FPGAcited by 2
- 2025Hardware-Accelerated Event-Graph Neural Networks for Low-Latency Time-Series Classification on SoC FPGAcited by 1
- 2026Line-based Event Preprocessing: Towards Low-Energy Neuromorphic Computer Visioncited by 0
- 2026End-to-End Keyword Spotting on FPGA Using Graph Neural Networks with a Neuromorphic Auditory Sensorcited by 0
- 2026End-to-End Keyword Spotting on FPGA Using Graph Neural Networks with a Neuromorphic Auditory Sensor10 May 2026
- 2026Hardware-accelerated graph neural networks: an alternative approach for neuromorphic event-based audio classification and keyword spotting on SoC FPGA18 Feb 2026
- 2026Line-based Event Preprocessing: Towards Low-Energy Neuromorphic Computer Vision10 Jan 2026
- 2025Hardware-Accelerated Event-Graph Neural Networks for Low-Latency Time-Series Classification on SoC FPGA9 Mar 2025