Pie: Pooling CPU Memory for LLM Inference
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Abstract (arXiv)
The rapid growth of LLMs has revolutionized natural language processing and AI analysis, but their increasing size and memory demands present significant challenges. A common solution is to spill over to CPU memory; however, traditional GPU-CPU memory swapping often results in higher latency and lower throughput. This paper introduces Pie, an LLM inference framework that addresses these challenges with performance-transparent swapping and adaptive expansion. By leveraging predictable memory access patterns and the high bandwidth of modern hardware like the NVIDIA GH200 Grace Hopper Superchip, Pie enables concurrent data swapping without affecting foreground computation, expanding effective memory without added latency. Adaptive expansion dynamically adjusts CPU memory allocation based on real-time information, optimizing memory usage and performance under varying conditions. Pie maintains low computation latency, high throughput, and high elasticity. Our experimental evaluation demonstrates that Pie achieves optimal swapping policy during cache warmup and effectively balances increased memory capacity with negligible impact on computation. With its extended capacity, Pie outperforms vLLM by up to 1.9X in throughput and 2X in latency. Additionally, Pie can reduce GPU memory usage by up to 1.67X while maintaining the same performance. Compared to FlexGen, an offline profiling-based swapping solution, Pie achieves magnitudes lower latency and 9.4X higher throughput.
Key facts. Cited by 13 papers in the map (data through 7 Oct 2026). Builds on 13 of its 51 references that are in the map. First posted on arXiv 14 Nov 2024.
Builds on
13 of 51 references.
References · 13
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Citing papers per year: 2025: 7; 2026: 6.
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- 2025SuperOffload: Unleashing the Power of Large-Scale LLM Training on Superchipscited by 6
- 2025TokenLake: A Unified Segment-level Prefix Cache Pool for Fine-grained Elastic Long-Context LLM Servingcited by 5
- 2025Echo: Efficient Co-Scheduling of Hybrid Online-Offline Tasks for Large Language Model Servingcited by 3
- 2025Towards Efficient Key-Value Cache Management for Prefix Prefilling in LLM Inferencecited by 2
- 2025VoltanaLLM: Energy-Efficient and SLO-Aware Disaggregated LLM Serving via Adaptive Frequency Control and State-Space Routingcited by 2
- 2025Adaptive and Resource-efficient Agentic AI Systems for Mobile and Embedded Devices: A Surveycited by 2
- 2026SuperInfer: SLO-Aware Rotary Scheduling and Memory Management for LLM Inference on Superchipscited by 2
- 2026Rethinking Latency Denial-of-Service: Attacking the LLM Serving Framework, Not the Modelcited by 2
- 2025FlexLink: Boosting your NVLink Bandwidth by 27% without accuracy concerncited by 1
- 2026BOOST: Concurrent Access to Host Memory and HBM to Accelerate LLM Inferencecited by 0
- 2026EMA: Elastic and Performance Transparent Memory Across GPUscited by 0
- 2026Crossflow: Prefill-Decode Elasticity for Agentic LLM Servingcited by 0
- 2026FluidPD: In-Place Elasticity for SLO-Aware Prefill-Decode Disaggregated LLM Serving2 Oct 2026
- 2026Crossflow: Prefill-Decode Elasticity for Agentic LLM Serving22 Sep 2026
- 2026EMA: Elastic and Performance Transparent Memory Across GPUs22 Sep 2026
- 2026BOOST: Concurrent Access to Host Memory and HBM to Accelerate LLM Inference11 Sep 2026
- 2026Rethinking Latency Denial-of-Service: Attacking the LLM Serving Framework, Not the Model8 Feb 2026
- 2026SuperInfer: SLO-Aware Rotary Scheduling and Memory Management for LLM Inference on Superchips28 Jan 2026
- 2025Adaptive and Resource-efficient Agentic AI Systems for Mobile and Embedded Devices: A Survey30 Sep 2025
- 2025SuperOffload: Unleashing the Power of Large-Scale LLM Training on Superchips25 Sep 2025
- 2025VoltanaLLM: Energy-Efficient and SLO-Aware Disaggregated LLM Serving via Adaptive Frequency Control and State-Space Routing5 Sep 2025
- 2025FlexLink: Boosting your NVLink Bandwidth by 27% without accuracy concern30 Aug 2025
- 2025TokenLake: A Unified Segment-level Prefix Cache Pool for Fine-grained Elastic Long-Context LLM Serving24 Aug 2025
- 2025Towards Efficient Key-Value Cache Management for Prefix Prefilling in LLM Inference28 May 2025
- 2025TokenLake: A Unified Segment-level Prefix Cache Pool for Fine-grained Elastic Long-Context LLM Servingcited by 5
- 2025Echo: Efficient Co-Scheduling of Hybrid Online-Offline Tasks for Large Language Model Servingcited by 3
- 2025Towards Efficient Key-Value Cache Management for Prefix Prefilling in LLM Inferencecited by 2
- 2025VoltanaLLM: Energy-Efficient and SLO-Aware Disaggregated LLM Serving via Adaptive Frequency Control and State-Space Routingcited by 2
- 2026SuperInfer: SLO-Aware Rotary Scheduling and Memory Management for LLM Inference on Superchipscited by 2
- 2026Rethinking Latency Denial-of-Service: Attacking the LLM Serving Framework, Not the Modelcited by 2
- 2026FluidPD: In-Place Elasticity for SLO-Aware Prefill-Decode Disaggregated LLM Servingcited by 0
- 2026FluidPD: In-Place Elasticity for SLO-Aware Prefill-Decode Disaggregated LLM Serving2 Oct 2026
- 2026Rethinking Latency Denial-of-Service: Attacking the LLM Serving Framework, Not the Model8 Feb 2026
- 2026SuperInfer: SLO-Aware Rotary Scheduling and Memory Management for LLM Inference on Superchips28 Jan 2026
- 2025VoltanaLLM: Energy-Efficient and SLO-Aware Disaggregated LLM Serving via Adaptive Frequency Control and State-Space Routing5 Sep 2025
- 2025TokenLake: A Unified Segment-level Prefix Cache Pool for Fine-grained Elastic Long-Context LLM Serving24 Aug 2025
- 2025Towards Efficient Key-Value Cache Management for Prefix Prefilling in LLM Inference28 May 2025
- 2025Echo: Efficient Co-Scheduling of Hybrid Online-Offline Tasks for Large Language Model Serving1 Mar 2025
- 2026Crossflow: Prefill-Decode Elasticity for Agentic LLM Serving22 Sep 2026
- 2025SuperOffload: Unleashing the Power of Large-Scale LLM Training on Superchipscited by 6
- 2025FlexLink: Boosting your NVLink Bandwidth by 27% without accuracy concerncited by 1
- 2026BOOST: Concurrent Access to Host Memory and HBM to Accelerate LLM Inferencecited by 0
- 2026EMA: Elastic and Performance Transparent Memory Across GPUscited by 0
- 2026EMA: Elastic and Performance Transparent Memory Across GPUs22 Sep 2026
- 2026BOOST: Concurrent Access to Host Memory and HBM to Accelerate LLM Inference11 Sep 2026
- 2025SuperOffload: Unleashing the Power of Large-Scale LLM Training on Superchips25 Sep 2025
- 2025FlexLink: Boosting your NVLink Bandwidth by 27% without accuracy concern30 Aug 2025