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Bayes2IMC: In-Memory Computing for Bayesian Binary Neural Networks

arXiv 2411.07902 ↗First posted 12 Nov 2024cs.ET cs.ARcited by 0

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Abstract (arXiv)

Bayesian Neural Networks (BNNs) provide superior estimates of uncertainty by generating an ensemble of predictive distributions. However, inference via ensembling is resource-intensive, requiring additional entropy sources to generate stochasticity which increases resource consumption. We introduce Bayes2IMC, an in-memory computing (IMC) architecture designed for binary Bayesian neural networks that leverage nanoscale device stochasticity to generate desired distributions. Our novel approach utilizes Phase-Change Memory (PCM) to harness inherent noise characteristics, enabling the creation of a binary neural network. This design eliminates the necessity for a pre-neuron Analog-to-Digital Converter (ADC), significantly improving power and area efficiency. We also develop a hardware-software co-optimized correction method applied solely on the logits in the final layer to reduce device-induced accuracy variations across deployments on hardware. Additionally, we devise a simple compensation technique that ensures no drop in classification accuracy despite conductance drift of PCM. We validate the effectiveness of our approach on the CIFAR-10 dataset with a VGGBinaryConnect model, achieving accuracy metrics comparable to ideal software implementations as well as results reported in the literature using other technologies. Finally, we present a complete core architecture and compare its projected power, performance, and area efficiency against an equivalent SRAM baseline, showing a 3.8 to 9.6 × improvement in total efficiency (in GOPS/W/mm2) and a 2.2 to 5.6 × improvement in power efficiency (in GOPS/W). In addition, the projected hardware performance of Bayes2IMC surpasses that of most of the BNN architectures based on memristive devices reported in the literature, and achieves up to 20% higher power efficiency compared to the state-of-the-art.

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References · 20

  1. 2017On Calibration of Modern Neural Networkscited by 4,960
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  8. 2021How to Certify Machine Learning Based Safety-critical Systems? A Systematic Literature Reviewcited by 39
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  10. 2020Unlabelled Data Improves Bayesian Uncertainty Calibration under Covariate Shiftcited by 21
  11. 2018VIBNN: Hardware Acceleration of Bayesian Neural Networkscited by 20
  12. 2020Wide Neural Networks with Bottlenecks are Deep Gaussian Processescited by 20
8 more
  1. 2020Efficient Computation Reduction in Bayesian Neural Networks Through Feature Decomposition and Memorizationcited by 10
  2. 2016Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Eracited by 9
  3. 2020BiSNN: Training Spiking Neural Networks with Binary Weights via Bayesian Learningcited by 8
  4. 2021High-Performance FPGA-based Accelerator for Bayesian Neural Networkscited by 8
  5. 2024Calibrating Bayesian Learning via Regularization, Confidence Minimization, and Selective Inferencecited by 7
  6. 2023Bayesian Inference on Binary Spiking Networks Leveraging Nanoscale Device Stochasticitycited by 3
  7. 2024Bayesian Inference Accelerator for Spiking Neural Networkscited by 2
  8. 2021Hybrid In-memory Computing Architecture for the Training of Deep Neural Networkscited by 1

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