FuseMax: Leveraging Extended Einsums to Optimize Attention Accelerator Design
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Abstract (arXiv)
Attention for transformers is a critical workload that has recently received significant "attention" as a target for custom acceleration. Yet, while prior work succeeds in reducing attention's memory-bandwidth requirements, it creates load imbalance between operators that comprise the attention computation (resulting in severe compute under-utilization) and requires on-chip memory that scales with sequence length (which is expected to grow over time). This paper ameliorates these issues, enabling attention with nearly 100% compute utilization, no off-chip memory traffic bottlenecks, and on-chip buffer size requirements that are independent of sequence length. The main conceptual contribution is to use a recently proposed abstraction -- the cascade of Einsums -- to describe, formalize, and taxonomize the space of attention algorithms that appear in the literature. In particular, we show how Einsum cascades can be used to infer non-trivial lower bounds on the number of passes a kernel must take through its input data, which has implications for either required on-chip buffer capacity or memory traffic. We show how this notion can be used to meaningfully divide the space of attention algorithms into several categories and use these categories to inform our design process. Based on the above characterization, we propose FuseMax -- a novel mapping and binding of attention onto a spatial array-style architecture. On attention, in an iso-area comparison, FuseMax achieves an average 6.7x speedup over the prior state-of-the-art, FLAT, while using 79% of the energy. Similarly, on full end-to-end transformer inference, FuseMax achieves an average 5.3x speedup over FLAT using 83 of the energy.
Key facts. Cited by 5 papers in the map (data through 7 Oct 2026). First posted on arXiv 15 Jun 2024.
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Citing papers per year: 2024: 1; 2025: 2; 2026: 2.
5 papers.
- 2025Tilus: A Tile-Level GPGPU Programming Language for Low-Precision Computationcited by 3
- 2025SystolicAttention: Fusing FlashAttention within a Single Systolic Arraycited by 1
- 2024MAS-Attention: Memory-Aware Stream Processing for Attention Acceleration on Resource-Constrained Edge Devicescited by 0
- 2026From Buffers to Registers: Unlocking Fine-Grained FlashAttention with Hybrid-Bonded 3D NPU Co-Designcited by 0
- 2026MONET: Modeling and Optimization of neural NEtwork Training from Edge to Data Centerscited by 0
- 2026MONET: Modeling and Optimization of neural NEtwork Training from Edge to Data Centers16 Mar 2026
- 2026From Buffers to Registers: Unlocking Fine-Grained FlashAttention with Hybrid-Bonded 3D NPU Co-Design11 Feb 2026
- 2025SystolicAttention: Fusing FlashAttention within a Single Systolic Array15 Jul 2025
- 2025Tilus: A Tile-Level GPGPU Programming Language for Low-Precision Computation17 Apr 2025
- 2024MAS-Attention: Memory-Aware Stream Processing for Attention Acceleration on Resource-Constrained Edge Devices20 Nov 2024