mlsanityData to 14 Oct 2026

Exploring Error Bits for Memory Failure Prediction: An In-Depth Correlative Study

arXiv 2312.02855 ↗First posted 5 Dec 2023cs.AR cs.AI cs.DCcited by 1

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Abstract (arXiv)

In large-scale datacenters, memory failure is a common cause of server crashes, with Uncorrectable Errors (UEs) being a major indicator of Dual Inline Memory Module (DIMM) defects. Existing approaches primarily focus on predicting UEs using Correctable Errors (CEs), without fully considering the information provided by error bits. However, error bit patterns have a strong correlation with the occurrence of UEs. In this paper, we present a comprehensive study on the correlation between CEs and UEs, specifically emphasizing the importance of spatio-temporal error bit information. Our analysis reveals a strong correlation between spatio-temporal error bits and UE occurrence. Through evaluations using real-world datasets, we demonstrate that our approach significantly improves prediction performance by 15% in F1-score compared to the state-of-the-art algorithms. Overall, our approach effectively reduces the number of virtual machine interruptions caused by UEs by approximately 59%.

Key facts. Cited by 1 paper in the map (data through 14 Oct 2026). Builds on 3 of its 35 references that are in the map. First posted on arXiv 5 Dec 2023.

Builds on

3 of 35 references.

References · 3

  1. 2020Workload-Aware DRAM Error Prediction using Machine Learningcited by 4
  2. 2022A Case for Transparent Reliability in DRAM Systemscited by 2
  3. 2022First CE Matters: On the Importance of Long Term Properties on Memory Failure Predictioncited by 2

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