Evaluating Emerging AI/ML Accelerators: IPU, RDU, and NVIDIA/AMD GPUs
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Abstract (arXiv)
The relentless advancement of artificial intelligence (AI) and machine learning (ML) applications necessitates the development of specialized hardware accelerators capable of handling the increasing complexity and computational demands. Traditional computing architectures, based on the von Neumann model, are being outstripped by the requirements of contemporary AI/ML algorithms, leading to a surge in the creation of accelerators like the Graphcore Intelligence Processing Unit (IPU), Sambanova Reconfigurable Dataflow Unit (RDU), and enhanced GPU platforms. These hardware accelerators are characterized by their innovative data-flow architectures and other design optimizations that promise to deliver superior performance and energy efficiency for AI/ML tasks. This research provides a preliminary evaluation and comparison of these commercial AI/ML accelerators, delving into their hardware and software design features to discern their strengths and unique capabilities. By conducting a series of benchmark evaluations on common DNN operators and other AI/ML workloads, we aim to illuminate the advantages of data-flow architectures over conventional processor designs and offer insights into the performance trade-offs of each platform. The findings from our study will serve as a valuable reference for the design and performance expectations of research prototypes, thereby facilitating the development of next-generation hardware accelerators tailored for the ever-evolving landscape of AI/ML applications. Through this analysis, we aspire to contribute to the broader understanding of current accelerator technologies and to provide guidance for future innovations in the field.
Key facts. Cited by 5 papers in the map (data through 7 Oct 2026). Builds on 5 of its 31 references that are in the map. First posted on arXiv 8 Nov 2023.
Builds on
5 of 31 references.
References · 5
- 2015Deep Residual Learning for Image Recognitioncited by 51,809
- 2018MobileNetV2: Inverted Residuals and Linear Bottleneckscited by 4,773
- 2019Fast Graph Representation Learning with PyTorch Geometriccited by 2,414
- 2019Dissecting the Graphcore IPU Architecture via Microbenchmarkingcited by 47
- 2023Accel-GCN: High-Performance GPU Accelerator Design for Graph Convolution Networkscited by 22
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Citing papers per year: 2024: 1; 2025: 2; 2026: 2.
5 papers.
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- 2026A Hardware-oriented Approach for Efficient Bayesian Inference Computation and Deploymentcited by 0
- 2026Made in Hungary: Comments on the performance of generative language modelscited by 0
- 2026Made in Hungary: Comments on the performance of generative language models16 Sep 2026
- 2026A Hardware-oriented Approach for Efficient Bayesian Inference Computation and Deployment20 Jul 2026
- 2025DABench-LLM: Standardized and In-Depth Benchmarking of Post-Moore Dataflow AI Accelerators for LLMs4 Dec 2025
- 2025Mixed-Precision Quantization for Language Models: Techniques and Prospects19 Oct 2025
- 2024Physics-informed generative real-time lens-free imaging12 Mar 2024