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Functional Specification of the RAVENS Neuroprocessor

arXiv 2307.15232 ↗First posted 27 Jul 2023cs.NEcited by 1

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Abstract (arXiv)

RAVENS is a neuroprocessor that has been developed by the TENNLab research group at the University of Tennessee. Its main focus has been as a vehicle for chip design with memristive elements; however it has also been the vehicle for all-digital CMOS development, plus it has implementations on FPGA's, microcontrollers and software simulation. The software simulation is supported by the TENNLab neuromorphic software framework so that researchers may develop RAVENS solutions for a variety of neuromorphic computing applications. This document provides a functional specification of RAVENS that should apply to all implementations of the RAVENS neuroprocessor.

Key facts. Cited by 1 paper in the map (data through 13 Oct 2026). First posted on arXiv 27 Jul 2023.

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