VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs
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Abstract (arXiv)
Deep Learning (DL) acceleration support in CPUs has recently gained a lot of traction, with several companies (Arm, Intel, IBM) announcing products with specialized matrix engines accessible via GEMM instructions. CPUs are pervasive and need to handle diverse requirements across DL workloads running in edge/HPC/cloud platforms. Therefore, as DL workloads embrace sparsity to reduce the computations and memory size of models, it is also imperative for CPUs to add support for sparsity to avoid under-utilization of the dense matrix engine and inefficient usage of the caches and registers. This work presents VEGETA, a set of ISA and microarchitecture extensions over dense matrix engines to support flexible structured sparsity for CPUs, enabling programmable support for diverse DL models with varying degrees of sparsity. Compared to the state-of-the-art (SOTA) dense matrix engine in CPUs, a VEGETA engine provides 1.09x, 2.20x, 3.74x, and 3.28x speed-ups when running 4:4 (dense), 2:4, 1:4, and unstructured (95%) sparse DNN layers.
Key facts. Cited by 9 papers in the map (data through 14 Oct 2026). Builds on 18 of its 54 references that are in the map. First posted on arXiv 17 Feb 2023.
Builds on
18 of 54 references.
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6 more
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Built on by
Citing papers per year: 2023: 1; 2024: 4; 2025: 4.
9 papers.
- 2024MicroScopiQ: Accelerating Foundational Models through Outlier-Aware Microscaling Quantizationcited by 28
- 2023Scaling Down to Scale Up: A Cost-Benefit Analysis of Replacing OpenAI's LLM with Open Source SLMs in Productioncited by 21
- 2024Progressive Gradient Flow for Robust N:M Sparsity Training in Transformerscited by 18
- 2024Enabling Unstructured Sparse Acceleration on Structured Sparse Acceleratorscited by 8
- 2025Accelerating LLM Inference with Flexible N:M Sparsity via A Fully Digital Compute-in-Memory Acceleratorcited by 3
- 2024ELSA: Exploiting Layer-wise N:M Sparsity for Vision Transformer Accelerationcited by 2
- 2025Lightweight Software Kernels and Hardware Extensions for Efficient Sparse Deep Neural Networks on Microcontrollerscited by 2
- 2025DECA: A Near-Core LLM Decompression Accelerator Grounded on a 3D Roofline Modelcited by 2
- 2025Periodic Online Testing for Sparse Systolic Tensor Arrayscited by 1
- 2025DECA: A Near-Core LLM Decompression Accelerator Grounded on a 3D Roofline Model25 May 2025
- 2025Periodic Online Testing for Sparse Systolic Tensor Arrays25 Apr 2025
- 2025Accelerating LLM Inference with Flexible N:M Sparsity via A Fully Digital Compute-in-Memory Accelerator19 Apr 2025
- 2025Lightweight Software Kernels and Hardware Extensions for Efficient Sparse Deep Neural Networks on Microcontrollers8 Mar 2025
- 2024MicroScopiQ: Accelerating Foundational Models through Outlier-Aware Microscaling Quantization8 Nov 2024
- 2024ELSA: Exploiting Layer-wise N:M Sparsity for Vision Transformer Acceleration15 Sep 2024
- 2024Enabling Unstructured Sparse Acceleration on Structured Sparse Accelerators12 Mar 2024
- 2024Progressive Gradient Flow for Robust N:M Sparsity Training in Transformers7 Feb 2024
- 2023Scaling Down to Scale Up: A Cost-Benefit Analysis of Replacing OpenAI's LLM with Open Source SLMs in Production20 Dec 2023