An Optical XNOR-Bitcount Based Accelerator for Efficient Inference of Binary Neural Networks
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Abstract (arXiv)
Binary Neural Networks (BNNs) are increasingly preferred over full-precision Convolutional Neural Networks(CNNs) to reduce the memory and computational requirements of inference processing with minimal accuracy drop. BNNs convert CNN model parameters to 1-bit precision, allowing inference of BNNs to be processed with simple XNOR and bitcount operations. This makes BNNs amenable to hardware acceleration. Several photonic integrated circuits (PICs) based BNN accelerators have been proposed. Although these accelerators provide remarkably higher throughput and energy efficiency than their electronic counterparts, the utilized XNOR and bitcount circuits in these accelerators need to be further enhanced to improve their area, energy efficiency, and throughput. This paper aims to fulfill this need. For that, we invent a single-MRR-based optical XNOR gate (OXG). Moreover, we present a novel design of bitcount circuit which we refer to as Photo-Charge Accumulator (PCA). We employ multiple OXGs in a cascaded manner using dense wavelength division multiplexing (DWDM) and connect them to the PCA, to forge a novel Optical XNOR-Bitcount based Binary Neural Network Accelerator (OXBNN). Our evaluation for the inference of four modern BNNs indicates that OXBNN provides improvements of up to 62x and 7.6x in frames-per-second (FPS) and FPS/W (energy efficiency), respectively, on geometric mean over two PIC-based BNN accelerators from prior work. We developed a transaction-level, event-driven python-based simulator for evaluation of accelerators (https://github.com/uky-UCAT/B_ONN_SIM).
Key facts. Cited by 3 papers in the map (data through 7 Oct 2026). Builds on 13 of its 29 references that are in the map. First posted on arXiv 3 Feb 2023.
Builds on
13 of 29 references.
References · 13
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Citing papers per year: 2023: 2; 2024: 1.
3 papers.
- 2023FwdLLM: Efficient FedLLM using Forward Gradientcited by 25
- 2023High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and Architecturescited by 1
- 2024HEANA: A Hybrid Time-Amplitude Analog Optical Accelerator with Flexible Dataflows for Energy-Efficient CNN Inferencecited by 0
- 2024HEANA: A Hybrid Time-Amplitude Analog Optical Accelerator with Flexible Dataflows for Energy-Efficient CNN Inference5 Feb 2024
- 2023FwdLLM: Efficient FedLLM using Forward Gradient26 Aug 2023
- 2023High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and Architectures15 Apr 2023