CMOS-compatible Ising and Potts Annealing Using Single Photon Avalanche Diodes
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Abstract (arXiv)
Massively parallel annealing processors may offer superior performance for a wide range of sampling and optimization problems. A key component dictating the size of these processors is the neuron update circuit, ideally implemented using special stochastic nanodevices. We leverage photon statistics using single photon avalanche diodes (SPADs) and temporal filtering to generate stochastic states. This method is a powerful alternative offering unique features not currently seen in annealing processors: the ability to continuously control the computational temperature and the seamless extension to the Potts model, a n-state generalization of the two-state Ising model. SPADs also offer a considerable practical advantage since they are readily manufacturable in current standard CMOS processes. As a first step towards realizing a CMOS SPAD-based annealer, we have designed Ising and Potts models driven by an array of discrete SPADs and show they accurately sample from their theoretical distributions.
Key facts. Cited by 4 papers in the map (data through 7 Oct 2026). First posted on arXiv 22 Nov 2022.
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Citing papers per year: 2023: 2; 2024: 0; 2025: 2.
4 papers.
- 2023CMOS + stochastic nanomagnets: heterogeneous computers for probabilistic inference and learningcited by 10
- 2023Machine Learning Quantum Systems with Magnetic p-bitscited by 1
- 2025The Gaussian-Multinoulli Restricted Boltzmann Machine: A Potts Model Extension of the GRBMcited by 1
- 2025Efficient Optimization Accelerator Framework for Multistate Ising Problemscited by 0
- 2025Efficient Optimization Accelerator Framework for Multistate Ising Problems26 May 2025
- 2025The Gaussian-Multinoulli Restricted Boltzmann Machine: A Potts Model Extension of the GRBM16 May 2025
- 2023Machine Learning Quantum Systems with Magnetic p-bits10 Oct 2023
- 2023CMOS + stochastic nanomagnets: heterogeneous computers for probabilistic inference and learning12 Apr 2023