Efficient Deep Learning Using Non-Volatile Memory Technology
Not on the map. Why?
Abstract (arXiv)
Embedded machine learning (ML) systems have now become the dominant platform for deploying ML serving tasks and are projected to become of equal importance for training ML models. With this comes the challenge of overall efficient deployment, in particular low power and high throughput implementations, under stringent memory constraints. In this context, non-volatile memory (NVM) technologies such as STT-MRAM and SOT-MRAM have significant advantages compared to conventional SRAM due to their non-volatility, higher cell density, and scalability features. While prior work has investigated several architectural implications of NVM for generic applications, in this work we present DeepNVM++, a comprehensive framework to characterize, model, and analyze NVM-based caches in GPU architectures for deep learning (DL) applications by combining technology-specific circuit-level models and the actual memory behavior of various DL workloads. DeepNVM++ relies on iso-capacity and iso-area performance and energy models for last-level caches implemented using conventional SRAM and emerging STT-MRAM and SOT-MRAM technologies. In the iso-capacity case, STT-MRAM and SOT-MRAM provide up to 3.8x and 4.7x energy-delay product (EDP) reduction and 2.4x and 2.8x area reduction compared to conventional SRAM, respectively. Under iso-area assumptions, STT-MRAM and SOT-MRAM provide up to 2.2x and 2.4x EDP reduction and accommodate 2.3x and 3.3x cache capacity when compared to SRAM, respectively. We also perform a scalability analysis and show that STT-MRAM and SOT-MRAM achieve orders of magnitude EDP reduction when compared to SRAM for large cache capacities. DeepNVM++ is demonstrated on STT-/SOT-MRAM technologies and can be used for the characterization, modeling, and analysis of any NVM technology for last-level caches in GPUs for DL applications.
Key facts. Cited by 1 paper in the map (data through 7 Oct 2026). Builds on 19 of its 81 references that are in the map. First posted on arXiv 27 Jun 2022.
Builds on
19 of 81 references.
References · 19
- 2015Deep Residual Learning for Image Recognitioncited by 51,809
- 2014Very Deep Convolutional Networks for Large-Scale Image Recognitioncited by 15,267
- 2019EfficientNet: Rethinking Model Scaling for Convolutional Neural Networkscited by 6,415
- 2014Going Deeper with Convolutionscited by 4,231
- 2015Deep Compression: Compressing Deep Neural Networks with Pruning, Trained Quantization and Huffman Codingcited by 2,291
- 2016SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and <0.5MB model sizecited by 1,054
- 2019EfficientDet: Scalable and Efficient Object Detectioncited by 1,018
- 2016EIE: Efficient Inference Engine on Compressed Deep Neural Networkcited by 291
- 2014Caffe: Convolutional Architecture for Fast Feature Embeddingcited by 287
- 2019Fixing the train-test resolution discrepancycited by 209
- 2020Chip Placement with Deep Reinforcement Learningcited by 83
- 2019Towards Efficient Model Compression via Learned Global Rankingcited by 75
7 more
- 2016Smart Reply: Automated Response Suggestion for Emailcited by 54
- 2020CryptoNAS: Private Inference on a ReLU Budgetcited by 40
- 2020The Architectural Implications of Distributed Reinforcement Learning on CPU-GPU Systemscited by 5
- 2020DeepNVM++: Cross-Layer Modeling and Optimization Framework of Non-Volatile Memories for Deep Learningcited by 4
- 2022QAPPA: Quantization-Aware Power, Performance, and Area Modeling of DNN Acceleratorscited by 4
- 2022QADAM: Quantization-Aware DNN Accelerator Modeling for Pareto-Optimalitycited by 3
- 2019Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Designcited by 1
Built on by
Citing papers per year: 2022: 1.
1 paper.