RL4ReAl: Reinforcement Learning for Register Allocation
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Abstract (arXiv)
We aim to automate decades of research and experience in register allocation, leveraging machine learning. We tackle this problem by embedding a multi-agent reinforcement learning algorithm within LLVM, training it with the state of the art techniques. We formalize the constraints that precisely define the problem for a given instruction-set architecture, while ensuring that the generated code preserves semantic correctness. We also develop a gRPC based framework providing a modular and efficient compiler interface for training and inference. Our approach is architecture independent: we show experimental results targeting Intel x86 and ARM AArch64. Our results match or out-perform the heavily tuned, production-grade register allocators of LLVM.
Key facts. Cited by 4 papers in the map (data through 7 Oct 2026). Builds on 18 of its 74 references that are in the map. First posted on arXiv 5 Apr 2022.
Builds on
18 of 74 references.
References · 18
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6 more
- 2019NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learningcited by 37
- 2020Static Neural Compiler Optimization via Deep Reinforcement Learningcited by 14
- 2019Coloring Big Graphs with AlphaGoZerocited by 13
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- 2018Combinatorial Register Allocation and Instruction Schedulingcited by 7
- 2020Optimizing Memory Placement using Evolutionary Graph Reinforcement Learningcited by 7
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Citing papers per year: 2023: 1; 2024: 0; 2025: 1; 2026: 2.
4 papers.
- 2026Agentic Harness for Real-World Compilers20 Mar 2026
- 2026CHEHAB RL: Learning to Optimize Fully Homomorphic Encryption Computations27 Jan 2026
- 2025VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM20 Jun 2025
- 2023The Next 700 ML-Enabled Compiler Optimizations17 Nov 2023