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Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors

arXiv 2011.04107 ↗First posted 8 Nov 2020cs.ET cs.ARcited by 1

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Abstract (arXiv)

The main design principles in computer architecture have recently shifted from a monolithic scaling-driven approach to the development of heterogeneous architectures that tightly co-integrate multiple specialized processor and memory chiplets. In such data-hungry multi-chip architectures, current Networks-in-Package (NiPs) may not be enough to cater to their heterogeneous and fast-changing communication demands. This position paper makes the case for wireless in-package nanonetworking as the enabler of efficient and versatile wired-wireless interconnect fabrics for massive heterogeneous processors. To that end, the use of graphene-based antennas and transceivers with unique frequency-beam reconfigurability in the terahertz band is proposed. The feasibility of such a nanonetworking vision and the main research challenges towards its realization are analyzed from the technological, communications, and computer architecture perspectives.

Key facts. Cited by 1 paper in the map (data through 7 Oct 2026). First posted on arXiv 8 Nov 2020.

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