Agile SoC Development with Open ESP
Not on the map. Why?
Abstract (arXiv)
ESP is an open-source research platform for heterogeneous SoC design. The platform combines a modular tile-based architecture with a variety of application-oriented flows for the design and optimization of accelerators. The ESP architecture is highly scalable and strikes a balance between regularity and specialization. The companion methodology raises the level of abstraction to system-level design and enables an automated flow from software and hardware development to full-system prototyping on FPGA. For application developers, ESP offers domain-specific automated solutions to synthesize new accelerators for their software and to map complex workloads onto the SoC architecture. For hardware engineers, ESP offers automated solutions to integrate their accelerator designs into the complete SoC. Conceived as a heterogeneous integration platform and tested through years of teaching at Columbia University, ESP supports the open-source hardware community by providing a flexible platform for agile SoC development.
Key facts. Cited by 5 papers in the map (data through 7 Oct 2026). First posted on arXiv 2 Sep 2020.
Builds on
No reference list yet.
Built on by
Citing papers per year: 2022: 1; 2023: 0; 2024: 1; 2025: 2; 2026: 1.
5 papers.
- 2022CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAscited by 11
- 2025hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardwarecited by 8
- 2025An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systemscited by 2
- 2024NOVA: NoC-based Vector Unit for Mapping Attention Layers on a CNN Acceleratorcited by 0
- 2026SPECTRA: Adaptive Execution of Speculative Decoding on a Runtime-Reconfigurable Tiled Architecturecited by 0
- 2026SPECTRA: Adaptive Execution of Speculative Decoding on a Runtime-Reconfigurable Tiled Architecture21 Sep 2026
- 2025hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware1 Dec 2025
- 2025An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems20 Aug 2025
- 2024NOVA: NoC-based Vector Unit for Mapping Attention Layers on a CNN Accelerator7 May 2024
- 2022CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs5 Jan 2022