SAIL: Machine Learning Guided Structural Analysis Attack on Hardware Obfuscation
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Abstract (arXiv)
Obfuscation is a technique for protecting hardware intellectual property (IP) blocks against reverse engineering, piracy, and malicious modifications. Current obfuscation efforts mainly focus on functional locking of a design to prevent black-box usage. They do not directly address hiding design intent through structural transformations, which is an important objective of obfuscation. We note that current obfuscation techniques incorporate only: (1) local, and (2) predictable changes in circuit topology. In this paper, we present SAIL, a structural attack on obfuscation using machine learning (ML) models that exposes a critical vulnerability of these methods. Through this attack, we demonstrate that the gate-level structure of an obfuscated design can be retrieved in most parts through a systematic set of steps. The proposed attack is applicable to all forms of logic obfuscation, and significantly more powerful than existing attacks, e.g., SAT-based attacks, since it does not require the availability of golden functional responses (e.g. an unlocked IC). Evaluation on benchmark circuits show that we can recover an average of around 84% (up to 95%) transformations introduced by obfuscation. We also show that this attack is scalable, flexible, and versatile.
Key facts. Cited by 7 papers in the map (data through 14 Oct 2026). First posted on arXiv 27 Sep 2018.
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Citing papers per year: 2021: 3; 2022: 2; 2023: 1; 2024: 1.
7 papers.
- 2021Deceptive Logic Locking for Hardware Integrity Protection against Machine Learning Attackscited by 3
- 2021ReIGNN: State Register Identification Using Graph Neural Networks for Circuit Reverse Engineeringcited by 3
- 2023ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuningcited by 2
- 2021Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunitiescited by 1
- 2022A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automationcited by 1
- 2022Security Closure of IC Layouts Against Hardware Trojanscited by 1
- 2024TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojanscited by 0
- 2024TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojans9 May 2024
- 2023ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning6 Mar 2023
- 2022Security Closure of IC Layouts Against Hardware Trojans15 Nov 2022
- 2022A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automation19 Apr 2022
- 2021ReIGNN: State Register Identification Using Graph Neural Networks for Circuit Reverse Engineering1 Dec 2021
- 2021Deceptive Logic Locking for Hardware Integrity Protection against Machine Learning Attacks19 Jul 2021
- 2021Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities5 Jul 2021