Restructuring Batch Normalization to Accelerate CNN Training
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Abstract (arXiv)
Batch Normalization (BN) has become a core design block of modern Convolutional Neural Networks (CNNs). A typical modern CNN has a large number of BN layers in its lean and deep architecture. BN requires mean and variance calculations over each mini-batch during training. Therefore, the existing memory access reduction techniques, such as fusing multiple CONV layers, are not effective for accelerating BN due to their inability to optimize mini-batch related calculations during training. To address this increasingly important problem, we propose to restructure BN layers by first splitting a BN layer into two sub-layers (fission) and then combining the first sub-layer with its preceding CONV layer and the second sub-layer with the following activation and CONV layers (fusion). The proposed solution can significantly reduce main-memory accesses while training the latest CNN models, and the experiments on a chip multiprocessor show that the proposed BN restructuring can improve the performance of DenseNet-121 by 25.7%.
Key facts. Cited by 12 papers in the map (data through 7 Oct 2026). First posted on arXiv 4 Jul 2018.
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Citing papers per year: 2021: 3; 2022: 2; 2023: 6; 2024: 0; 2025: 0; 2026: 1.
12 papers.
- 2023AdaptiveNet: Post-deployment Neural Architecture Adaptation for Diverse Edge Environmentscited by 19
- 2022FlexBlock: A Flexible DNN Training Accelerator with Multi-Mode Block Floating Point Supportcited by 10
- 2021GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descentcited by 9
- 2023Enabling Resource-efficient AIoT System with Cross-level Optimization: A surveycited by 8
- 2023Towards Efficient In-memory Computing Hardware for Quantized Neural Networks: State-of-the-art, Open Challenges and Perspectivescited by 5
- 2021Towards Efficient Full 8-bit Integer DNN Online Training on Resource-limited Devices without Batch Normalizationcited by 4
- 2023SGCN: Exploiting Compressed-Sparse Features in Deep Graph Convolutional Network Acceleratorscited by 4
- 2023Robust Brain MRI Image Classification with SIBOW-SVMcited by 2
- 2023Slice-and-Forge: Making Better Use of Caches for Graph Convolutional Network Acceleratorscited by 1
- 2021Optimizing the Whole-life Cost in End-to-end CNN Accelerationcited by 0
- 2022LightNorm: Area and Energy-Efficient Batch Normalization Hardware for On-Device DNN Trainingcited by 0
- 2026From Detection to Response: A Deep Learning and Retrieval-Augmented Generation Framework for Network Intrusion Mitigationcited by 0
- 2026From Detection to Response: A Deep Learning and Retrieval-Augmented Generation Framework for Network Intrusion Mitigation18 May 2026
- 2023Robust Brain MRI Image Classification with SIBOW-SVM15 Nov 2023
- 2023Enabling Resource-efficient AIoT System with Cross-level Optimization: A survey27 Sep 2023
- 2023Towards Efficient In-memory Computing Hardware for Quantized Neural Networks: State-of-the-art, Open Challenges and Perspectives8 Jul 2023
- 2023AdaptiveNet: Post-deployment Neural Architecture Adaptation for Diverse Edge Environments13 Mar 2023
- 2023SGCN: Exploiting Compressed-Sparse Features in Deep Graph Convolutional Network Accelerators25 Jan 2023
- 2023Slice-and-Forge: Making Better Use of Caches for Graph Convolutional Network Accelerators24 Jan 2023
- 2022LightNorm: Area and Energy-Efficient Batch Normalization Hardware for On-Device DNN Training4 Nov 2022
- 2022FlexBlock: A Flexible DNN Training Accelerator with Multi-Mode Block Floating Point Support13 Mar 2022
- 2021Towards Efficient Full 8-bit Integer DNN Online Training on Resource-limited Devices without Batch Normalization27 May 2021
- 2021Optimizing the Whole-life Cost in End-to-end CNN Acceleration12 Apr 2021
- 2021GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent15 Feb 2021